341 lines
6.2 KiB
Plaintext
341 lines
6.2 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
/*
|
|
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
|
|
*
|
|
*/
|
|
/ {
|
|
vcc_mipidphy0: vcc-mipidcphy0-regulator {
|
|
//status = "disabled";
|
|
compatible = "regulator-fixed";
|
|
gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mipidphy0_pwr>;
|
|
regulator-name = "vcc_mipidphy0";
|
|
enable-active-high;
|
|
};
|
|
flash_led: flash-led {
|
|
status = "okay";
|
|
compatible = "led,rgb13h";
|
|
label = "pwm-flash-led";
|
|
led-max-microamp = <20000>;
|
|
flash-max-microamp = <20000>;
|
|
flash-max-timeout-us = <1000000>;
|
|
pwms=<&pwm14 0 25000 0>;
|
|
rockchip,camera-module-index = <3>;
|
|
rockchip,camera-module-facing = "front";
|
|
};
|
|
|
|
};
|
|
|
|
&pwm14 {
|
|
status = "okay";
|
|
pinctrl-0 = <&pwm14m2_pins>;
|
|
};
|
|
|
|
//&csi2_dcphy0_hw {
|
|
// status = "disabled";
|
|
//};
|
|
|
|
//&csi2_dcphy1_hw {
|
|
// status = "disabled";
|
|
//};
|
|
|
|
|
|
&csi2_dphy0_hw {
|
|
status = "okay";
|
|
};
|
|
|
|
//&csi2_dphy1_hw {
|
|
// status = "okay";
|
|
//};
|
|
|
|
&csi2_dphy1 {
|
|
status = "okay";
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
port@0 {
|
|
reg = <0>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
mipi_in_ucam2: endpoint@1 {
|
|
reg = <1>;
|
|
remote-endpoint = <&gc2053_out2>;
|
|
data-lanes = <1 2>;
|
|
};
|
|
};
|
|
port@1 {
|
|
reg = <1>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
csidphy1_out: endpoint@0 {
|
|
reg = <0>;
|
|
remote-endpoint = <&mipi2_csi2_input>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&csi2_dphy2 {
|
|
status = "okay";
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
port@0 {
|
|
reg = <0>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
mipi_in_ucam3: endpoint@1 {
|
|
reg = <1>;
|
|
remote-endpoint = <&gc2093_out3>;
|
|
data-lanes = <1 2>;
|
|
};
|
|
};
|
|
port@1 {
|
|
reg = <1>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
csidphy2_out: endpoint@0 {
|
|
reg = <0>;
|
|
remote-endpoint = <&mipi3_csi2_input>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
|
|
|
|
&i2c3 {
|
|
status = "okay";
|
|
|
|
/* module 77/79 0x1a 78/80 0x36 */
|
|
gc2053: gc2053b@37 {
|
|
compatible = "galaxycore,gc2053";
|
|
status = "okay";
|
|
reg = <0x37>;
|
|
|
|
clocks = <&cru CLK_MIPI_CAMARAOUT_M4>;
|
|
clock-names = "xvclk";
|
|
power-domains = <&power RK3588_PD_VI>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mipim0_camera4_clk>;
|
|
avdd-supply = <&vcc_mipidphy0>;
|
|
|
|
power-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
|
|
pwdn-gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>;
|
|
firefly,clkout-enabled-index = <1>;
|
|
rockchip,camera-module-index = <2>;
|
|
rockchip,camera-module-facing = "back";
|
|
rockchip,camera-module-name = "YT-RV1109-2-V1";
|
|
rockchip,camera-module-lens-name = "40IR-2MP-F20";
|
|
port {
|
|
gc2053_out2: endpoint {
|
|
remote-endpoint = <&mipi_in_ucam2>;
|
|
data-lanes = <1 2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
gc2093: gc2093b@7e {
|
|
compatible = "galaxycore,gc2093";
|
|
status = "okay";
|
|
reg = <0x7e>;
|
|
//clocks = <&cru CLK_MIPI_CAMARAOUT_M3>;
|
|
clock-names = "xvclk";
|
|
pinctrl-names = "default";
|
|
//pinctrl-0 = <&mipim0_camera3_clk>;
|
|
power-domains = <&power RK3588_PD_VI>;
|
|
avdd-supply = <&vcc_mipidphy0>;
|
|
flash-leds = <&flash_led>;
|
|
//reset-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
|
|
pwdn-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
|
|
firefly,clkout-enabled-index = <0>;
|
|
rockchip,camera-module-index = <3>;
|
|
rockchip,camera-module-facing = "front";
|
|
rockchip,camera-module-name = "YT-RV1109-2-V1";
|
|
rockchip,camera-module-lens-name = "40IR-2MP-F20";
|
|
port {
|
|
gc2093_out3: endpoint {
|
|
remote-endpoint = <&mipi_in_ucam3>;
|
|
data-lanes = <1 2>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
|
|
&mipi2_csi2 {
|
|
status = "okay";
|
|
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
mipi2_csi2_input: endpoint@1 {
|
|
reg = <1>;
|
|
remote-endpoint = <&csidphy1_out>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
mipi2_csi2_output: endpoint@0 {
|
|
reg = <0>;
|
|
remote-endpoint = <&cif_mipi_in2>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&mipi3_csi2 {
|
|
status = "okay";
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
mipi3_csi2_input: endpoint@1 {
|
|
reg = <1>;
|
|
remote-endpoint = <&csidphy2_out>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
mipi3_csi2_output: endpoint@0 {
|
|
reg = <0>;
|
|
remote-endpoint = <&cif_mipi_in3>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
|
|
&rkcif {
|
|
status = "okay";
|
|
};
|
|
|
|
|
|
&rkcif_mipi_lvds2 {
|
|
status = "okay";
|
|
|
|
port {
|
|
cif_mipi_in2: endpoint {
|
|
remote-endpoint = <&mipi2_csi2_output>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&rkcif_mipi_lvds2_sditf {
|
|
status = "okay";
|
|
|
|
port {
|
|
mipi2_lvds_sditf: endpoint {
|
|
remote-endpoint = <&isp0_vir2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&rkcif_mipi_lvds3 {
|
|
status = "okay";
|
|
|
|
port {
|
|
cif_mipi_in3: endpoint {
|
|
remote-endpoint = <&mipi3_csi2_output>;
|
|
};
|
|
};
|
|
};
|
|
|
|
|
|
&rkcif_mipi_lvds3_sditf {
|
|
status = "okay";
|
|
|
|
port {
|
|
mipi3_lvds_sditf: endpoint {
|
|
remote-endpoint = <&isp1_vir0>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&rkcif_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkisp0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&isp0_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
|
|
&rkisp1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&isp1_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkisp0_vir2 {
|
|
status = "okay";
|
|
|
|
port {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
isp0_vir2: endpoint@0 {
|
|
reg = <0>;
|
|
remote-endpoint = <&mipi2_lvds_sditf>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&rkisp1_vir0 {
|
|
status = "okay";
|
|
|
|
port {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
isp1_vir0: endpoint@0 {
|
|
reg = <0>;
|
|
remote-endpoint = <&mipi3_lvds_sditf>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pinctrl {
|
|
cam {
|
|
mipidphy0_pwr: mipidphy0-pwr {
|
|
rockchip,pins =
|
|
/* camera power en */
|
|
<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
};
|