openEuler_kernel_rk3588/arch/arm64/boot/dts/rockchip/rk3588-lubancat-5-v2.dts
2026-01-27 16:07:55 +08:00

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
* Copyright (c) 2023 EmbedFire <embedfire@embedfire.com>
*/
/dts-v1/;
#include "rk3588-lubancat-5.dts"
/ {
model = "Embedfire LubanCat-5 V2";
compatible = "embedfire,rk3588-lubancat-5-v2", "rockchip,rk3588";
};
&backlight_dsi0 {
status = "disabled";
pwms = <&pwm2 0 25000 0>;
};
&backlight_dsi1 {
status = "disabled";
pwms = <&pwm5 0 25000 0>;
};
&pwm0 {
status = "disabled";
};
&pwm1 {
status = "disabled";
};
&pwm2 {
status = "disabled";
pinctrl-0 = <&pwm2m0_pins>;
};
&pwm5 {
status = "disabled";
pinctrl-0 = <&pwm5m1_pins>;
};
&usbc0 {
interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&fusb302_int>;
};
&pcie2x1l0 {
disable-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
};
&&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1m1_xfer>;
};
&pinctrl {
usb-typec {
fusb302_int: fusb302-int {
rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
dsi {
dsi0_reset: dsi0-reset {
rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};