860 lines
26 KiB
C
860 lines
26 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright(c) 2021 Huawei Technologies Co., Ltd */
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#ifndef HINIC3_HW_H
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#define HINIC3_HW_H
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#include "mpu_inband_cmd.h"
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#include "mpu_inband_cmd_defs.h"
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#include "hinic3_crm.h"
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#ifndef BIG_ENDIAN
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#define BIG_ENDIAN 0x4321
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#endif
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#ifndef LITTLE_ENDIAN
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#define LITTLE_ENDIAN 0x1234
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#endif
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#ifdef BYTE_ORDER
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#undef BYTE_ORDER
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#endif
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/* X86 */
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#define BYTE_ORDER LITTLE_ENDIAN
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/* to use 0-level CLA, page size must be: SQ 16B(wqe) * 64k(max_q_depth) */
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#define HINIC3_DEFAULT_WQ_PAGE_SIZE 0x100000
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#define HINIC3_HW_WQ_PAGE_SIZE 0x1000
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#define HINIC3_MAX_WQ_PAGE_SIZE_ORDER 8
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#define SPU_HOST_ID 4
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enum hinic3_channel_id {
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HINIC3_CHANNEL_DEFAULT,
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HINIC3_CHANNEL_COMM,
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HINIC3_CHANNEL_NIC,
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HINIC3_CHANNEL_ROCE,
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HINIC3_CHANNEL_TOE,
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HINIC3_CHANNEL_FC,
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HINIC3_CHANNEL_OVS,
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HINIC3_CHANNEL_DSW,
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HINIC3_CHANNEL_MIG,
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HINIC3_CHANNEL_CRYPT,
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HINIC3_CHANNEL_MAX = 32,
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};
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struct hinic3_cmd_buf {
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void *buf;
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dma_addr_t dma_addr;
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u16 size;
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/* Usage count, USERS DO NOT USE */
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atomic_t ref_cnt;
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};
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enum hinic3_aeq_type {
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HINIC3_HW_INTER_INT = 0,
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HINIC3_MBX_FROM_FUNC = 1,
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HINIC3_MSG_FROM_MGMT_CPU = 2,
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HINIC3_API_RSP = 3,
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HINIC3_API_CHAIN_STS = 4,
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HINIC3_MBX_SEND_RSLT = 5,
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HINIC3_MAX_AEQ_EVENTS
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};
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enum hinic3_aeq_sw_type {
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HINIC3_STATELESS_EVENT = 0,
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HINIC3_STATEFUL_EVENT = 1,
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HINIC3_MAX_AEQ_SW_EVENTS
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};
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enum hinic3_hwdev_init_state {
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HINIC3_HWDEV_NONE_INITED = 0,
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HINIC3_HWDEV_MGMT_INITED,
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HINIC3_HWDEV_MBOX_INITED,
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HINIC3_HWDEV_CMDQ_INITED,
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};
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enum hinic3_ceq_event {
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HINIC3_NON_L2NIC_SCQ,
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HINIC3_NON_L2NIC_ECQ,
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HINIC3_NON_L2NIC_NO_CQ_EQ,
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HINIC3_CMDQ,
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HINIC3_L2NIC_SQ,
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HINIC3_L2NIC_RQ,
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HINIC3_MAX_CEQ_EVENTS,
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};
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enum hinic3_mbox_seg_errcode {
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MBOX_ERRCODE_NO_ERRORS = 0,
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/* VF send the mailbox data to the wrong destination functions */
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MBOX_ERRCODE_VF_TO_WRONG_FUNC = 0x100,
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/* PPF send the mailbox data to the wrong destination functions */
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MBOX_ERRCODE_PPF_TO_WRONG_FUNC = 0x200,
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/* PF send the mailbox data to the wrong destination functions */
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MBOX_ERRCODE_PF_TO_WRONG_FUNC = 0x300,
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/* The mailbox data size is set to all zero */
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MBOX_ERRCODE_ZERO_DATA_SIZE = 0x400,
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/* The sender function attribute has not been learned by hardware */
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MBOX_ERRCODE_UNKNOWN_SRC_FUNC = 0x500,
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/* The receiver function attr has not been learned by hardware */
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MBOX_ERRCODE_UNKNOWN_DES_FUNC = 0x600,
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};
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struct hinic3_ceq_info {
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u32 q_len;
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u32 page_size;
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u16 elem_size;
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u16 num_pages;
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u32 num_elem_in_pg;
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};
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typedef void (*hinic3_aeq_hwe_cb)(void *pri_handle, u8 *data, u8 size);
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typedef u8 (*hinic3_aeq_swe_cb)(void *pri_handle, u8 event, u8 *data);
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typedef void (*hinic3_ceq_event_cb)(void *pri_handle, u32 ceqe_data);
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typedef int (*hinic3_vf_mbox_cb)(void *pri_handle,
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u16 cmd, void *buf_in, u16 in_size, void *buf_out, u16 *out_size);
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typedef int (*hinic3_pf_mbox_cb)(void *pri_handle,
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u16 vf_id, u16 cmd, void *buf_in, u16 in_size, void *buf_out, u16 *out_size);
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typedef int (*hinic3_ppf_mbox_cb)(void *pri_handle, u16 pf_idx,
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u16 vf_id, u16 cmd, void *buf_in, u16 in_size, void *buf_out, u16 *out_size);
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typedef int (*hinic3_pf_recv_from_ppf_mbox_cb)(void *pri_handle,
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u16 cmd, void *buf_in, u16 in_size, void *buf_out, u16 *out_size);
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/**
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* @brief hinic3_aeq_register_hw_cb - register aeq hardware callback
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* @param hwdev: device pointer to hwdev
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* @param event: event type
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* @param hwe_cb: callback function
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* @retval zero: success
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* @retval non-zero: failure
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**/
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int hinic3_aeq_register_hw_cb(void *hwdev, void *pri_handle,
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enum hinic3_aeq_type event, hinic3_aeq_hwe_cb hwe_cb);
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/**
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* @brief hinic3_aeq_unregister_hw_cb - unregister aeq hardware callback
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* @param hwdev: device pointer to hwdev
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* @param event: event type
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**/
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void hinic3_aeq_unregister_hw_cb(void *hwdev, enum hinic3_aeq_type event);
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/**
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* @brief hinic3_aeq_register_swe_cb - register aeq soft event callback
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* @param hwdev: device pointer to hwdev
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* @pri_handle: the pointer to private invoker device
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* @param event: event type
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* @param aeq_swe_cb: callback function
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* @retval zero: success
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* @retval non-zero: failure
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**/
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int hinic3_aeq_register_swe_cb(void *hwdev, void *pri_handle, enum hinic3_aeq_sw_type event,
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hinic3_aeq_swe_cb aeq_swe_cb);
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/**
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* @brief hinic3_aeq_unregister_swe_cb - unregister aeq soft event callback
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* @param hwdev: device pointer to hwdev
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* @param event: event type
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**/
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void hinic3_aeq_unregister_swe_cb(void *hwdev, enum hinic3_aeq_sw_type event);
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/**
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* @brief hinic3_ceq_register_cb - register ceq callback
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* @param hwdev: device pointer to hwdev
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* @param event: event type
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* @param callback: callback function
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* @retval zero: success
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* @retval non-zero: failure
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**/
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int hinic3_ceq_register_cb(void *hwdev, void *pri_handle, enum hinic3_ceq_event event,
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hinic3_ceq_event_cb callback);
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/**
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* @brief hinic3_ceq_unregister_cb - unregister ceq callback
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* @param hwdev: device pointer to hwdev
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* @param event: event type
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**/
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void hinic3_ceq_unregister_cb(void *hwdev, enum hinic3_ceq_event event);
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/**
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* @brief hinic3_register_ppf_mbox_cb - ppf register mbox msg callback
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* @param hwdev: device pointer to hwdev
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* @param mod: mod type
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* @param pri_handle: private data will be used by the callback
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* @param callback: callback function
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* @retval zero: success
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* @retval non-zero: failure
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**/
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int hinic3_register_ppf_mbox_cb(void *hwdev, u8 mod, void *pri_handle,
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hinic3_ppf_mbox_cb callback);
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/**
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* @brief hinic3_register_pf_mbox_cb - pf register mbox msg callback
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* @param hwdev: device pointer to hwdev
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* @param mod: mod type
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* @param pri_handle: private data will be used by the callback
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* @param callback: callback function
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* @retval zero: success
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* @retval non-zero: failure
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**/
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int hinic3_register_pf_mbox_cb(void *hwdev, u8 mod, void *pri_handle,
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hinic3_pf_mbox_cb callback);
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/**
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* @brief hinic3_register_vf_mbox_cb - vf register mbox msg callback
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* @param hwdev: device pointer to hwdev
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* @param mod: mod type
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* @param pri_handle: private data will be used by the callback
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* @param callback: callback function
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* @retval zero: success
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* @retval non-zero: failure
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**/
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int hinic3_register_vf_mbox_cb(void *hwdev, u8 mod, void *pri_handle,
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hinic3_vf_mbox_cb callback);
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/**
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* @brief hinic3_unregister_ppf_mbox_cb - ppf unregister mbox msg callback
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* @param hwdev: device pointer to hwdev
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* @param mod: mod type
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**/
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void hinic3_unregister_ppf_mbox_cb(void *hwdev, u8 mod);
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/**
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* @brief hinic3_unregister_pf_mbox_cb - pf register mbox msg callback
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* @param hwdev: device pointer to hwdev
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* @param mod: mod type
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**/
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void hinic3_unregister_pf_mbox_cb(void *hwdev, u8 mod);
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/**
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* @brief hinic3_unregister_vf_mbox_cb - pf register mbox msg callback
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* @param hwdev: device pointer to hwdev
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* @param mod: mod type
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**/
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void hinic3_unregister_vf_mbox_cb(void *hwdev, u8 mod);
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/**
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* @brief hinic3_unregister_ppf_to_pf_mbox_cb - unregister mbox msg callback
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* @param hwdev: device pointer to hwdev
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* @param mod: mod type
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**/
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void hinic3_unregister_ppf_to_pf_mbox_cb(void *hwdev, u8 mod);
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typedef void (*hinic3_mgmt_msg_cb)(void *pri_handle,
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u16 cmd, void *buf_in, u16 in_size,
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void *buf_out, u16 *out_size);
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/**
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* @brief hinic3_register_service_adapter - register mgmt msg callback
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* @param hwdev: device pointer to hwdev
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* @param mod: mod type
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* @param pri_handle: private data will be used by the callback
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* @param callback: callback function
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* @retval zero: success
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* @retval non-zero: failure
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**/
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int hinic3_register_mgmt_msg_cb(void *hwdev, u8 mod, void *pri_handle,
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hinic3_mgmt_msg_cb callback);
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/**
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* @brief hinic3_unregister_mgmt_msg_cb - unregister mgmt msg callback
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* @param hwdev: device pointer to hwdev
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* @param mod: mod type
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**/
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void hinic3_unregister_mgmt_msg_cb(void *hwdev, u8 mod);
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/**
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* @brief hinic3_register_service_adapter - register service adapter
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* @param hwdev: device pointer to hwdev
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* @param service_adapter: service adapter
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* @param type: service type
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* @retval zero: success
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* @retval non-zero: failure
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**/
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int hinic3_register_service_adapter(void *hwdev, void *service_adapter,
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enum hinic3_service_type type);
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/**
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* @brief hinic3_unregister_service_adapter - unregister service adapter
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* @param hwdev: device pointer to hwdev
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* @param type: service type
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**/
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void hinic3_unregister_service_adapter(void *hwdev,
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enum hinic3_service_type type);
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/**
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* @brief hinic3_get_service_adapter - get service adapter
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* @param hwdev: device pointer to hwdev
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* @param type: service type
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* @retval non-zero: success
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* @retval null: failure
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**/
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void *hinic3_get_service_adapter(void *hwdev, enum hinic3_service_type type);
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/**
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* @brief hinic3_alloc_db_phy_addr - alloc doorbell & direct wqe pyhsical addr
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* @param hwdev: device pointer to hwdev
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* @param db_base: pointer to alloc doorbell base address
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* @param dwqe_base: pointer to alloc direct base address
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* @retval zero: success
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* @retval non-zero: failure
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**/
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int hinic3_alloc_db_phy_addr(void *hwdev, u64 *db_base, u64 *dwqe_base);
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/**
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* @brief hinic3_free_db_phy_addr - free doorbell & direct wqe physical address
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* @param hwdev: device pointer to hwdev
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* @param db_base: pointer to free doorbell base address
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* @param dwqe_base: pointer to free direct base address
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**/
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void hinic3_free_db_phy_addr(void *hwdev, u64 db_base, u64 dwqe_base);
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/**
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* @brief hinic3_alloc_db_addr - alloc doorbell & direct wqe
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* @param hwdev: device pointer to hwdev
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* @param db_base: pointer to alloc doorbell base address
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* @param dwqe_base: pointer to alloc direct base address
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* @retval zero: success
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* @retval non-zero: failure
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**/
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int hinic3_alloc_db_addr(void *hwdev, void __iomem **db_base,
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void __iomem **dwqe_base);
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/**
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* @brief hinic3_free_db_addr - free doorbell & direct wqe
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* @param hwdev: device pointer to hwdev
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* @param db_base: pointer to free doorbell base address
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* @param dwqe_base: pointer to free direct base address
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**/
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void hinic3_free_db_addr(void *hwdev, const void __iomem *db_base,
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void __iomem *dwqe_base);
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/**
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* @brief hinic3_alloc_db_phy_addr - alloc physical doorbell & direct wqe
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* @param hwdev: device pointer to hwdev
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* @param db_base: pointer to alloc doorbell base address
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* @param dwqe_base: pointer to alloc direct base address
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* @retval zero: success
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* @retval non-zero: failure
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**/
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int hinic3_alloc_db_phy_addr(void *hwdev, u64 *db_base, u64 *dwqe_base);
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/**
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* @brief hinic3_free_db_phy_addr - free physical doorbell & direct wqe
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* @param hwdev: device pointer to hwdev
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* @param db_base: free doorbell base address
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* @param dwqe_base: free direct base address
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**/
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void hinic3_free_db_phy_addr(void *hwdev, u64 db_base, u64 dwqe_base);
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/**
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* @brief hinic3_set_root_ctxt - set root context
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* @param hwdev: device pointer to hwdev
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* @param rq_depth: rq depth
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* @param sq_depth: sq depth
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* @param rx_buf_sz: rx buffer size
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* @param channel: channel id
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* @retval zero: success
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* @retval non-zero: failure
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**/
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int hinic3_set_root_ctxt(void *hwdev, u32 rq_depth, u32 sq_depth,
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int rx_buf_sz, u16 channel);
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/**
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* @brief hinic3_clean_root_ctxt - clean root context
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* @param hwdev: device pointer to hwdev
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* @param channel: channel id
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* @retval zero: success
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* @retval non-zero: failure
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**/
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int hinic3_clean_root_ctxt(void *hwdev, u16 channel);
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/**
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* @brief hinic3_alloc_cmd_buf - alloc cmd buffer
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* @param hwdev: device pointer to hwdev
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* @retval non-zero: success
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* @retval null: failure
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**/
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struct hinic3_cmd_buf *hinic3_alloc_cmd_buf(void *hwdev);
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/**
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* @brief hinic3_free_cmd_buf - free cmd buffer
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* @param hwdev: device pointer to hwdev
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* @param cmd_buf: cmd buffer to free
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**/
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void hinic3_free_cmd_buf(void *hwdev, struct hinic3_cmd_buf *cmd_buf);
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/**
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* hinic3_sm_ctr_rd16 - small single 16 counter read
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* @hwdev: the hardware device
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* @node: the node id
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* @ctr_id: counter id
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* @value: read counter value ptr
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* Return: 0 - success, negative - failure
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**/
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int hinic3_sm_ctr_rd16(void *hwdev, u8 node, u8 instance, u32 ctr_id, u16 *value);
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/**
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* @brief hinic3_sm_ctr_rd32 - small single 32 counter read
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* @param hwdev: device pointer to hwdev
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* @param node: the node id
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* @param instance: instance id
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* @param ctr_id: counter id
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* @param value: read counter value ptr
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* @retval zero: success
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* @retval non-zero: failure
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**/
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int hinic3_sm_ctr_rd32(void *hwdev, u8 node, u8 instance, u32 ctr_id,
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u32 *value);
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/**
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* @brief hinic3_sm_ctr_rd32_clear - small single 32 counter read clear
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* @param hwdev: device pointer to hwdev
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* @param node: the node id
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* @param instance: instance id
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* @param ctr_id: counter id
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* @param value: read counter value ptr
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* @retval zero: success
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* @retval non-zero: failure
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**/
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int hinic3_sm_ctr_rd32_clear(void *hwdev, u8 node, u8 instance,
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u32 ctr_id, u32 *value);
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/**
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* @brief hinic3_sm_ctr_rd64_pair - big pair 128 counter read
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* @param hwdev: device pointer to hwdev
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* @param node: the node id
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* @param instance: instance id
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* @param ctr_id: counter id
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* @param value1: read counter value ptr
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* @param value2: read counter value ptr
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* @retval zero: success
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* @retval non-zero: failure
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**/
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int hinic3_sm_ctr_rd64_pair(void *hwdev, u8 node, u8 instance,
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u32 ctr_id, u64 *value1, u64 *value2);
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/**
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* hinic3_sm_ctr_rd64_pair_clear - big pair 128 counter read
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* @hwdev: the hardware device
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* @node: the node id
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* @ctr_id: counter id
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* @value1: read counter value ptr
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* @value2: read counter value ptr
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* Return: 0 - success, negative - failure
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**/
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int hinic3_sm_ctr_rd64_pair_clear(void *hwdev, u8 node, u8 instance,
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u32 ctr_id, u64 *value1, u64 *value2);
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/**
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* @brief hinic3_sm_ctr_rd64 - big counter 64 read
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* @param hwdev: device pointer to hwdev
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* @param node: the node id
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* @param instance: instance id
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|
* @param ctr_id: counter id
|
|
* @param value: read counter value ptr
|
|
* @retval zero: success
|
|
* @retval non-zero: failure
|
|
**/
|
|
int hinic3_sm_ctr_rd64(void *hwdev, u8 node, u8 instance, u32 ctr_id,
|
|
u64 *value);
|
|
|
|
/**
|
|
* hinic3_sm_ctr_rd64_clear - big counter 64 read
|
|
* @hwdev: the hardware device
|
|
* @node: the node id
|
|
* @ctr_id: counter id
|
|
* @value: read counter value ptr
|
|
* Return: 0 - success, negative - failure
|
|
**/
|
|
int hinic3_sm_ctr_rd64_clear(void *hwdev, u8 node, u8 instance,
|
|
u32 ctr_id, u64 *value);
|
|
|
|
/**
|
|
* @brief hinic3_api_csr_rd32 - read 32 byte csr
|
|
* @param hwdev: device pointer to hwdev
|
|
* @param dest: hardware node id
|
|
* @param addr: reg address
|
|
* @param val: reg value
|
|
* @retval zero: success
|
|
* @retval non-zero: failure
|
|
*/
|
|
int hinic3_api_csr_rd32(void *hwdev, u8 dest, u32 addr, u32 *val);
|
|
|
|
/**
|
|
* @brief hinic3_api_csr_wr32 - write 32 byte csr
|
|
* @param hwdev: device pointer to hwdev
|
|
* @param dest: hardware node id
|
|
* @param addr: reg address
|
|
* @param val: reg value
|
|
* @retval zero: success
|
|
* @retval non-zero: failure
|
|
*/
|
|
int hinic3_api_csr_wr32(void *hwdev, u8 dest, u32 addr, u32 val);
|
|
|
|
/**
|
|
* @brief hinic3_api_csr_rd64 - read 64 byte csr
|
|
* @param hwdev: device pointer to hwdev
|
|
* @param dest: hardware node id
|
|
* @param addr: reg address
|
|
* @param val: reg value
|
|
* @retval zero: success
|
|
* @retval non-zero: failure
|
|
*/
|
|
int hinic3_api_csr_rd64(void *hwdev, u8 dest, u32 addr, u64 *val);
|
|
|
|
/**
|
|
* @brief hinic3_dbg_get_hw_stats - get hardware stats
|
|
* @param hwdev: device pointer to hwdev
|
|
* @param hw_stats: pointer to memory caller to alloc
|
|
* @param out_size: out size
|
|
* @retval zero: success
|
|
* @retval non-zero: failure
|
|
*/
|
|
int hinic3_dbg_get_hw_stats(const void *hwdev, u8 *hw_stats, const u32 *out_size);
|
|
|
|
/**
|
|
* @brief hinic3_dbg_clear_hw_stats - clear hardware stats
|
|
* @param hwdev: device pointer to hwdev
|
|
* @retval clear hardware size
|
|
*/
|
|
u16 hinic3_dbg_clear_hw_stats(void *hwdev);
|
|
|
|
/**
|
|
* @brief hinic3_get_chip_fault_stats - get chip fault stats
|
|
* @param hwdev: device pointer to hwdev
|
|
* @param chip_fault_stats: pointer to memory caller to alloc
|
|
* @param offset: offset
|
|
*/
|
|
void hinic3_get_chip_fault_stats(const void *hwdev, u8 *chip_fault_stats,
|
|
u32 offset);
|
|
|
|
/**
|
|
* @brief hinic3_msg_to_mgmt_sync - msg to management cpu
|
|
* @param hwdev: device pointer to hwdev
|
|
* @param mod: mod type
|
|
* @param cmd: cmd
|
|
* @param buf_in: message buffer in
|
|
* @param in_size: in buffer size
|
|
* @param buf_out: message buffer out
|
|
* @param out_size: out buffer size
|
|
* @param timeout: timeout
|
|
* @param channel: channel id
|
|
* @retval zero: success
|
|
* @retval non-zero: failure
|
|
*/
|
|
int hinic3_msg_to_mgmt_sync(void *hwdev, u8 mod, u16 cmd, void *buf_in,
|
|
u16 in_size, void *buf_out, u16 *out_size,
|
|
u32 timeout, u16 channel);
|
|
|
|
/**
|
|
* @brief hinic3_msg_to_mgmt_async - msg to management cpu async
|
|
* @param hwdev: device pointer to hwdev
|
|
* @param mod: mod type
|
|
* @param cmd: cmd
|
|
* @param buf_in: message buffer in
|
|
* @param in_size: in buffer size
|
|
* @param channel: channel id
|
|
* @retval zero: success
|
|
* @retval non-zero: failure
|
|
*
|
|
* The function does not sleep inside, allowing use in irq context
|
|
*/
|
|
int hinic3_msg_to_mgmt_async(void *hwdev, u8 mod, u16 cmd, void *buf_in,
|
|
u16 in_size, u16 channel);
|
|
|
|
/**
|
|
* @brief hinic3_msg_to_mgmt_no_ack - msg to management cpu don't need no ack
|
|
* @param hwdev: device pointer to hwdev
|
|
* @param mod: mod type
|
|
* @param cmd: cmd
|
|
* @param buf_in: message buffer in
|
|
* @param in_size: in buffer size
|
|
* @param channel: channel id
|
|
* @retval zero: success
|
|
* @retval non-zero: failure
|
|
*
|
|
* The function will sleep inside, and it is not allowed to be used in
|
|
* interrupt context
|
|
*/
|
|
int hinic3_msg_to_mgmt_no_ack(void *hwdev, u8 mod, u16 cmd, void *buf_in,
|
|
u16 in_size, u16 channel);
|
|
|
|
int hinic3_msg_to_mgmt_api_chain_async(void *hwdev, u8 mod, u16 cmd,
|
|
const void *buf_in, u16 in_size);
|
|
|
|
int hinic3_msg_to_mgmt_api_chain_sync(void *hwdev, u8 mod, u16 cmd,
|
|
void *buf_in, u16 in_size, void *buf_out,
|
|
u16 *out_size, u32 timeout);
|
|
|
|
/**
|
|
* @brief hinic3_mbox_to_pf - vf mbox message to pf
|
|
* @param hwdev: device pointer to hwdev
|
|
* @param mod: mod type
|
|
* @param cmd: cmd
|
|
* @param buf_in: message buffer in
|
|
* @param in_size: in buffer size
|
|
* @param buf_out: message buffer out
|
|
* @param out_size: out buffer size
|
|
* @param timeout: timeout
|
|
* @param channel: channel id
|
|
* @retval zero: success
|
|
* @retval non-zero: failure
|
|
*/
|
|
int hinic3_mbox_to_pf(void *hwdev, u8 mod, u16 cmd, void *buf_in,
|
|
u16 in_size, void *buf_out, u16 *out_size,
|
|
u32 timeout, u16 channel);
|
|
|
|
/**
|
|
* @brief hinic3_mbox_to_vf - mbox message to vf
|
|
* @param hwdev: device pointer to hwdev
|
|
* @param vf_id: vf index
|
|
* @param mod: mod type
|
|
* @param cmd: cmd
|
|
* @param buf_in: message buffer in
|
|
* @param in_size: in buffer size
|
|
* @param buf_out: message buffer out
|
|
* @param out_size: out buffer size
|
|
* @param timeout: timeout
|
|
* @param channel: channel id
|
|
* @retval zero: success
|
|
* @retval non-zero: failure
|
|
*/
|
|
int hinic3_mbox_to_vf(void *hwdev, u16 vf_id, u8 mod, u16 cmd, void *buf_in,
|
|
u16 in_size, void *buf_out, u16 *out_size, u32 timeout,
|
|
u16 channel);
|
|
|
|
/**
|
|
* @brief hinic3_mbox_to_vf_no_ack - mbox message to vf no ack
|
|
* @param hwdev: device pointer to hwdev
|
|
* @param vf_id: vf index
|
|
* @param mod: mod type
|
|
* @param cmd: cmd
|
|
* @param buf_in: message buffer in
|
|
* @param in_size: in buffer size
|
|
* @param buf_out: message buffer out
|
|
* @param out_size: out buffer size
|
|
* @param channel: channel id
|
|
* @retval zero: success
|
|
* @retval non-zero: failure
|
|
*/
|
|
int hinic3_mbox_to_vf_no_ack(void *hwdev, u16 vf_id, u8 mod, u16 cmd, void *buf_in,
|
|
u16 in_size, void *buf_out, u16 *out_size, u16 channel);
|
|
|
|
int hinic3_clp_to_mgmt(void *hwdev, u8 mod, u16 cmd, const void *buf_in,
|
|
u16 in_size, void *buf_out, u16 *out_size);
|
|
/**
|
|
* @brief hinic3_cmdq_async - cmdq asynchronous message
|
|
* @param hwdev: device pointer to hwdev
|
|
* @param mod: mod type
|
|
* @param cmd: cmd
|
|
* @param buf_in: message buffer in
|
|
* @param channel: channel id
|
|
* @retval zero: success
|
|
* @retval non-zero: failure
|
|
*/
|
|
int hinic3_cmdq_async(void *hwdev, u8 mod, u8 cmd, struct hinic3_cmd_buf *buf_in, u16 channel);
|
|
|
|
/**
|
|
* @brief hinic3_cmdq_async_cos - cmdq asynchronous message by cos
|
|
* @param hwdev: device pointer to hwdev
|
|
* @param mod: mod type
|
|
* @param cmd: cmd
|
|
* @param cos_id: cos id
|
|
* @param buf_in: message buffer in
|
|
* @param channel: channel id
|
|
* @retval zero: success
|
|
* @retval non-zero: failure
|
|
*/
|
|
int hinic3_cmdq_async_cos(void *hwdev, u8 mod, u8 cmd, u8 cos_id,
|
|
struct hinic3_cmd_buf *buf_in, u16 channel);
|
|
|
|
/**
|
|
* @brief hinic3_cmdq_detail_resp - cmdq direct message response
|
|
* @param hwdev: device pointer to hwdev
|
|
* @param mod: mod type
|
|
* @param cmd: cmd
|
|
* @param buf_in: message buffer in
|
|
* @param out_param: message out
|
|
* @param timeout: timeout
|
|
* @param channel: channel id
|
|
* @retval zero: success
|
|
* @retval non-zero: failure
|
|
*/
|
|
int hinic3_cmdq_direct_resp(void *hwdev, u8 mod, u8 cmd,
|
|
struct hinic3_cmd_buf *buf_in,
|
|
u64 *out_param, u32 timeout, u16 channel);
|
|
|
|
/**
|
|
* @brief hinic3_cmdq_detail_resp - cmdq detail message response
|
|
* @param hwdev: device pointer to hwdev
|
|
* @param mod: mod type
|
|
* @param cmd: cmd
|
|
* @param buf_in: message buffer in
|
|
* @param buf_out: message buffer out
|
|
* @param out_param: inline output data
|
|
* @param timeout: timeout
|
|
* @param channel: channel id
|
|
* @retval zero: success
|
|
* @retval non-zero: failure
|
|
*/
|
|
int hinic3_cmdq_detail_resp(void *hwdev, u8 mod, u8 cmd,
|
|
struct hinic3_cmd_buf *buf_in,
|
|
struct hinic3_cmd_buf *buf_out,
|
|
u64 *out_param, u32 timeout, u16 channel);
|
|
|
|
/**
|
|
* @brief hinic3_cmdq_detail_resp - cmdq detail message response
|
|
* @param hwdev: device pointer to hwdev
|
|
* @param mod: mod type
|
|
* @param cmd: cmd
|
|
* @param cos_id: cos id
|
|
* @param buf_in: message buffer in
|
|
* @param buf_out: message buffer out
|
|
* @param out_param: inline output data
|
|
* @param timeout: timeout
|
|
* @param channel: channel id
|
|
* @retval zero: success
|
|
* @retval non-zero: failure
|
|
*/
|
|
int hinic3_cos_id_detail_resp(void *hwdev, u8 mod, u8 cmd, u8 cos_id,
|
|
struct hinic3_cmd_buf *buf_in,
|
|
struct hinic3_cmd_buf *buf_out,
|
|
u64 *out_param, u32 timeout, u16 channel);
|
|
|
|
/**
|
|
* @brief hinic3_ppf_tmr_start - start ppf timer
|
|
* @param hwdev: device pointer to hwdev
|
|
* @retval zero: success
|
|
* @retval non-zero: failure
|
|
*/
|
|
int hinic3_ppf_tmr_start(void *hwdev);
|
|
|
|
/**
|
|
* @brief hinic3_ppf_tmr_stop - stop ppf timer
|
|
* @param hwdev: device pointer to hwdev
|
|
* @retval zero: success
|
|
* @retval non-zero: failure
|
|
*/
|
|
int hinic3_ppf_tmr_stop(void *hwdev);
|
|
|
|
/**
|
|
* @brief hinic3_func_tmr_bitmap_set - set timer bitmap status
|
|
* @param hwdev: device pointer to hwdev
|
|
* @param func_id: global function index
|
|
* @param enable: 0-disable, 1-enable
|
|
* @retval zero: success
|
|
* @retval non-zero: failure
|
|
*/
|
|
int hinic3_func_tmr_bitmap_set(void *hwdev, u16 func_id, bool en);
|
|
|
|
/**
|
|
* @brief hinic3_get_board_info - get board info
|
|
* @param hwdev: device pointer to hwdev
|
|
* @param info: board info
|
|
* @param channel: channel id
|
|
* @retval zero: success
|
|
* @retval non-zero: failure
|
|
*/
|
|
int hinic3_get_board_info(void *hwdev, struct hinic3_board_info *info,
|
|
u16 channel);
|
|
|
|
/**
|
|
* @brief hinic3_set_wq_page_size - set work queue page size
|
|
* @param hwdev: device pointer to hwdev
|
|
* @param func_idx: function id
|
|
* @param page_size: page size
|
|
* @param channel: channel id
|
|
* @retval zero: success
|
|
* @retval non-zero: failure
|
|
*/
|
|
int hinic3_set_wq_page_size(void *hwdev, u16 func_idx, u32 page_size,
|
|
u16 channel);
|
|
|
|
/**
|
|
* @brief hinic3_event_callback - evnet callback to notify service driver
|
|
* @param hwdev: device pointer to hwdev
|
|
* @param event: event info to service driver
|
|
*/
|
|
void hinic3_event_callback(void *hwdev, struct hinic3_event_info *event);
|
|
|
|
/**
|
|
* @brief hinic3_dbg_lt_rd_16byte - liner table read
|
|
* @param hwdev: device pointer to hwdev
|
|
* @param dest: destine id
|
|
* @param instance: instance id
|
|
* @param lt_index: liner table index id
|
|
* @param data: data
|
|
*/
|
|
int hinic3_dbg_lt_rd_16byte(void *hwdev, u8 dest, u8 instance,
|
|
u32 lt_index, u8 *data);
|
|
|
|
/**
|
|
* @brief hinic3_dbg_lt_wr_16byte_mask - liner table write
|
|
* @param hwdev: device pointer to hwdev
|
|
* @param dest: destine id
|
|
* @param instance: instance id
|
|
* @param lt_index: liner table index id
|
|
* @param data: data
|
|
* @param mask: mask
|
|
*/
|
|
int hinic3_dbg_lt_wr_16byte_mask(void *hwdev, u8 dest, u8 instance,
|
|
u32 lt_index, u8 *data, u16 mask);
|
|
|
|
/**
|
|
* @brief hinic3_link_event_stats - link event stats
|
|
* @param hwdev: device pointer to hwdev
|
|
* @param link: link status
|
|
*/
|
|
void hinic3_link_event_stats(void *dev, u8 link);
|
|
|
|
/**
|
|
* @brief hinic3_get_hw_pf_infos - get pf infos
|
|
* @param hwdev: device pointer to hwdev
|
|
* @param infos: pf infos
|
|
* @param channel: channel id
|
|
*/
|
|
int hinic3_get_hw_pf_infos(void *hwdev, struct hinic3_hw_pf_infos *infos,
|
|
u16 channel);
|
|
|
|
/**
|
|
* @brief hinic3_func_reset - reset func
|
|
* @param hwdev: device pointer to hwdev
|
|
* @param func_id: global function index
|
|
* @param reset_flag: reset flag
|
|
* @param channel: channel id
|
|
*/
|
|
int hinic3_func_reset(void *dev, u16 func_id, u64 reset_flag, u16 channel);
|
|
|
|
int hinic3_get_ppf_timer_cfg(void *hwdev);
|
|
|
|
int hinic3_set_bdf_ctxt(void *hwdev, u8 bus, u8 device, u8 function);
|
|
|
|
int hinic3_init_func_mbox_msg_channel(void *hwdev, u16 num_func);
|
|
|
|
int hinic3_ppf_ht_gpa_init(void *dev);
|
|
|
|
void hinic3_ppf_ht_gpa_deinit(void *dev);
|
|
|
|
int hinic3_get_sml_table_info(void *hwdev, u32 tbl_id, u8 *node_id, u8 *instance_id);
|
|
|
|
int hinic3_mbox_ppf_to_host(void *hwdev, u8 mod, u16 cmd, u8 host_id,
|
|
void *buf_in, u16 in_size, void *buf_out,
|
|
u16 *out_size, u32 timeout, u16 channel);
|
|
|
|
void hinic3_force_complete_all(void *dev);
|
|
int hinic3_get_ceq_page_phy_addr(void *hwdev, u16 q_id,
|
|
u16 page_idx, u64 *page_phy_addr);
|
|
int hinic3_set_ceq_irq_disable(void *hwdev, u16 q_id);
|
|
int hinic3_get_ceq_info(void *hwdev, u16 q_id, struct hinic3_ceq_info *ceq_info);
|
|
|
|
int hinic3_init_single_ceq_status(void *hwdev, u16 q_id);
|
|
void hinic3_set_api_stop(void *hwdev);
|
|
|
|
int hinic3_activate_firmware(void *hwdev, u8 cfg_index);
|
|
int hinic3_switch_config(void *hwdev, u8 cfg_index);
|
|
|
|
#endif
|