101 lines
2.8 KiB
C
101 lines
2.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) Huawei Technologies Co., Ltd. 2021-2022. All rights reserved.
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* File Name : comm_defs.h
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* Version : Initial Draft
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* Description : common definitions
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* Function List :
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* History :
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* Modification: Created file
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*/
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#ifndef COMM_DEFS_H
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#define COMM_DEFS_H
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/* CMDQ MODULE_TYPE */
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enum hinic3_mod_type {
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HINIC3_MOD_COMM = 0, /* HW communication module */
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HINIC3_MOD_L2NIC = 1, /* L2NIC module */
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HINIC3_MOD_ROCE = 2,
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HINIC3_MOD_PLOG = 3,
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HINIC3_MOD_TOE = 4,
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HINIC3_MOD_FLR = 5,
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HINIC3_MOD_RSVD1 = 6,
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HINIC3_MOD_CFGM = 7, /* Configuration module */
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HINIC3_MOD_CQM = 8,
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HINIC3_MOD_RSVD2 = 9,
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COMM_MOD_FC = 10,
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HINIC3_MOD_OVS = 11,
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HINIC3_MOD_DSW = 12,
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HINIC3_MOD_MIGRATE = 13,
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HINIC3_MOD_HILINK = 14,
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HINIC3_MOD_CRYPT = 15, /* secure crypto module */
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HINIC3_MOD_VIO = 16,
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HINIC3_MOD_IMU = 17,
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HINIC3_MOD_DFT = 18, /* DFT */
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HINIC3_MOD_HW_MAX = 19, /* hardware max module id */
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/* Software module id, for PF/VF and multi-host */
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HINIC3_MOD_SW_FUNC = 20,
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HINIC3_MOD_MAX,
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};
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/* func reset的flag ,用于指示清理哪种资源 */
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enum func_reset_flag {
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RES_TYPE_FLUSH_BIT = 0,
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RES_TYPE_MQM,
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RES_TYPE_SMF,
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RES_TYPE_PF_BW_CFG,
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RES_TYPE_COMM = 10,
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RES_TYPE_COMM_MGMT_CH, /* clear mbox and aeq, The RES_TYPE_COMM bit must be set */
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RES_TYPE_COMM_CMD_CH, /* clear cmdq and ceq, The RES_TYPE_COMM bit must be set */
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RES_TYPE_NIC,
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RES_TYPE_OVS,
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RES_TYPE_VBS,
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RES_TYPE_ROCE,
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RES_TYPE_FC,
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RES_TYPE_TOE,
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RES_TYPE_IPSEC,
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RES_TYPE_MAX,
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};
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#define HINIC3_COMM_RES \
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((1 << RES_TYPE_COMM) | (1 << RES_TYPE_COMM_CMD_CH) | \
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(1 << RES_TYPE_FLUSH_BIT) | (1 << RES_TYPE_MQM) | \
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(1 << RES_TYPE_SMF) | (1 << RES_TYPE_PF_BW_CFG))
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#define HINIC3_NIC_RES BIT(RES_TYPE_NIC)
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#define HINIC3_OVS_RES BIT(RES_TYPE_OVS)
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#define HINIC3_VBS_RES BIT(RES_TYPE_VBS)
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#define HINIC3_ROCE_RES BIT(RES_TYPE_ROCE)
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#define HINIC3_FC_RES BIT(RES_TYPE_FC)
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#define HINIC3_TOE_RES BIT(RES_TYPE_TOE)
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#define HINIC3_IPSEC_RES BIT(RES_TYPE_IPSEC)
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/* MODE OVS、NIC、UNKNOWN */
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#define HINIC3_WORK_MODE_OVS 0
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#define HINIC3_WORK_MODE_UNKNOWN 1
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#define HINIC3_WORK_MODE_NIC 2
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#define DEVICE_TYPE_L2NIC 0
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#define DEVICE_TYPE_NVME 1
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#define DEVICE_TYPE_VIRTIO_NET 2
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#define DEVICE_TYPE_VIRTIO_BLK 3
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#define DEVICE_TYPE_VIRTIO_VSOCK 4
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#define DEVICE_TYPE_VIRTIO_NET_TRANSITION 5
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#define DEVICE_TYPE_VIRTIO_BLK_TRANSITION 6
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#define DEVICE_TYPE_VIRTIO_SCSI_TRANSITION 7
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#define DEVICE_TYPE_VIRTIO_HPC 8
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/* Common header control information of the COMM message
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* interaction command word between the driver and PF
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*/
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struct comm_info_head {
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u8 status;
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u8 version;
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u8 rep_aeq_num;
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u8 rsvd[5];
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};
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#endif
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