157 lines
4.5 KiB
C
157 lines
4.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Phytium display drm driver
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*
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* Copyright (C) 2021-2023, Phytium Technology Co., Ltd.
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*/
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#ifndef __PHYTIUM_DP_H__
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#define __PHYTIUM_DP_H__
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#include <drm/display/drm_dp.h>
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#include <drm/display/drm_dp_helper.h>
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#include <drm/drm_encoder.h>
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#include <sound/hdmi-codec.h>
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struct phytium_dp_device;
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#include "phytium_panel.h"
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struct audio_info {
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int sample_rate;
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int channels;
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int sample_width;
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};
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struct dp_audio_n_m {
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int sample_rate;
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int link_rate;
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u16 m;
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u16 n;
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};
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struct phytium_dp_compliance {
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unsigned long test_type;
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uint32_t test_link_rate;
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u8 test_lane_count;
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bool test_active;
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u8 reserve[2];
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};
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struct phytium_dp_func {
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uint8_t (*dp_hw_get_source_lane_count)(struct phytium_dp_device *phytium_dp);
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int (*dp_hw_reset)(struct phytium_dp_device *phytium_dp);
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bool (*dp_hw_spread_is_enable)(struct phytium_dp_device *phytium_dp);
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int (*dp_hw_set_backlight)(struct phytium_dp_device *phytium_dp, uint32_t level);
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uint32_t (*dp_hw_get_backlight)(struct phytium_dp_device *phytium_dp);
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void (*dp_hw_disable_backlight)(struct phytium_dp_device *phytium_dp);
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void (*dp_hw_enable_backlight)(struct phytium_dp_device *phytium_dp);
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void (*dp_hw_poweroff_panel)(struct phytium_dp_device *phytium_dp);
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void (*dp_hw_poweron_panel)(struct phytium_dp_device *phytium_dp);
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int (*dp_hw_init_phy)(struct phytium_dp_device *phytium_dp);
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void (*dp_hw_set_phy_lane_setting)(struct phytium_dp_device *phytium_dp,
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uint32_t link_rate, uint8_t train_set);
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int (*dp_hw_set_phy_lane_and_rate)(struct phytium_dp_device *phytium_dp,
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uint8_t link_lane_count,
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uint32_t link_rate);
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};
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struct phytium_dp_hpd_state {
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bool hpd_event_state;
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bool hpd_irq_state;
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bool hpd_raw_state;
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bool hpd_irq_enable;
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};
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struct phytium_dp_device {
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struct drm_device *dev;
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struct drm_encoder encoder;
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struct drm_connector connector;
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int port;
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struct drm_display_mode mode;
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bool link_trained;
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bool detect_done;
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bool is_edp;
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bool reserve0;
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struct drm_dp_aux aux;
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unsigned char dpcd[DP_RECEIVER_CAP_SIZE];
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uint8_t edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE];
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unsigned char downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
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unsigned char sink_count;
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int *source_rates;
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int num_source_rates;
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int sink_rates[DP_MAX_SUPPORTED_RATES];
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int num_sink_rates;
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int common_rates[DP_MAX_SUPPORTED_RATES];
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int num_common_rates;
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int source_max_lane_count;
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int sink_max_lane_count;
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int common_max_lane_count;
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int max_link_rate;
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int max_link_lane_count;
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int link_rate;
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int link_lane_count;
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struct work_struct train_retry_work;
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int train_retry_count;
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uint32_t trigger_train_fail;
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unsigned char train_set[4];
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struct edid *edp_edid;
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bool has_audio;
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bool fast_train_support;
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bool hw_spread_enable;
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bool reserve[1];
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struct platform_device *audio_pdev;
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struct audio_info audio_info;
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hdmi_codec_plugged_cb plugged_cb;
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struct device *codec_dev;
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struct phytium_dp_compliance compliance;
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struct phytium_dp_func *funcs;
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struct phytium_dp_hpd_state dp_hpd_state;
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struct phytium_panel panel;
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struct drm_display_mode native_mode;
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};
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union phytium_phy_tp {
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struct {
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/* DpcdPhyTestPatterns. This field is 2 bits for DP1.1
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* and 3 bits for DP1.2.
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*/
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uint8_t PATTERN :3;
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uint8_t RESERVED :5;
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} bits;
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uint8_t raw;
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};
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/* PHY test patterns
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* The order of test patterns follows DPCD register PHY_TEST_PATTERN (0x248)
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*/
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enum phytium_dpcd_phy_tp {
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PHYTIUM_PHY_TP_NONE = 0,
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PHYTIUM_PHY_TP_D10_2,
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PHYTIUM_PHY_TP_SYMBOL_ERROR,
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PHYTIUM_PHY_TP_PRBS7,
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PHYTIUM_PHY_TP_80BIT_CUSTOM,
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PHYTIUM_PHY_TP_CP2520_1,
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PHYTIUM_PHY_TP_CP2520_2,
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PHYTIUM_PHY_TP_CP2520_3,
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};
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#define PHYTIUM_DP_AUDIO_ID (('P' << 24) + ('H' << 16) + ('Y' << 8))
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#define encoder_to_dp_device(x) container_of(x, struct phytium_dp_device, encoder)
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#define connector_to_dp_device(x) container_of(x, struct phytium_dp_device, connector)
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#define panel_to_dp_device(x) container_of(x, struct phytium_dp_device, panel)
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#define train_retry_to_dp_device(x) container_of(x, struct phytium_dp_device, train_retry_work)
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void phytium_phy_writel(struct phytium_dp_device *phytium_dp, uint32_t address, uint32_t data);
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uint32_t phytium_phy_readl(struct phytium_dp_device *phytium_dp, uint32_t address);
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int phytium_dp_init(struct drm_device *dev, int pipe);
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int phytium_dp_resume(struct drm_device *drm_dev);
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void phytium_dp_hpd_irq_setup(struct drm_device *dev, bool enable);
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irqreturn_t phytium_dp_hpd_irq_handler(struct phytium_display_private *priv);
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void phytium_dp_hpd_work_func(struct work_struct *work);
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const struct dp_audio_n_m *phytium_dp_audio_get_n_m(int link_rate, int sample_rate);
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#endif /* __PHYTIUM_DP_H__ */
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