370 lines
9.0 KiB
C
370 lines
9.0 KiB
C
// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2022 Arm Ltd.
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/* Parse the MPAM ACPI table feeding the discovered nodes into the driver */
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#define pr_fmt(fmt) "ACPI MPAM: " fmt
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#include <linux/acpi.h>
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#include <linux/arm_mpam.h>
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#include <linux/cpu.h>
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#include <linux/cpumask.h>
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#include <linux/platform_device.h>
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#include <acpi/processor.h>
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#include <asm/mpam.h>
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/* Flags for acpi_table_mpam_msc.*_interrupt_flags */
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#define ACPI_MPAM_MSC_IRQ_MODE_EDGE 1
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#define ACPI_MPAM_MSC_IRQ_TYPE_MASK (3<<1)
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#define ACPI_MPAM_MSC_IRQ_TYPE_WIRED 0
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#define ACPI_MPAM_MSC_IRQ_AFFINITY_PROCESSOR_CONTAINER (1<<3)
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#define ACPI_MPAM_MSC_IRQ_AFFINITY_VALID (1<<4)
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static bool frob_irq(struct platform_device *pdev, int intid, u32 flags,
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int *irq, u32 processor_container_uid)
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{
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int sense;
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if (!intid)
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return false;
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/* 0 in this field indicates a wired interrupt */
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if (flags & ACPI_MPAM_MSC_IRQ_TYPE_MASK)
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return false;
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if (flags & ACPI_MPAM_MSC_IRQ_MODE_EDGE)
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sense = ACPI_EDGE_SENSITIVE;
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else
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sense = ACPI_LEVEL_SENSITIVE;
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/*
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* If the GSI is in the GIC's PPI range, try and create a partitioned
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* percpu interrupt.
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*/
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if (16 <= intid && intid < 32 && processor_container_uid != ~0) {
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pr_err_once("Partitioned interrupts not supported\n");
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return false;
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} else {
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*irq = acpi_register_gsi(&pdev->dev, intid, sense,
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ACPI_ACTIVE_HIGH);
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}
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if (*irq <= 0) {
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pr_err_once("Failed to register interrupt 0x%x with ACPI\n",
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intid);
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return false;
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}
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return true;
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}
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static void acpi_mpam_parse_irqs(struct platform_device *pdev,
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struct acpi_mpam_msc_node *tbl_msc,
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struct resource *res, int *res_idx)
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{
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u32 flags, aff = ~0;
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int irq;
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flags = tbl_msc->overflow_interrupt_flags;
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if (flags & ACPI_MPAM_MSC_IRQ_AFFINITY_VALID &&
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flags & ACPI_MPAM_MSC_IRQ_AFFINITY_PROCESSOR_CONTAINER)
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aff = tbl_msc->overflow_interrupt_affinity;
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if (frob_irq(pdev, tbl_msc->overflow_interrupt, flags, &irq, aff)) {
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res[*res_idx].start = irq;
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res[*res_idx].end = irq;
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res[*res_idx].flags = IORESOURCE_IRQ;
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res[*res_idx].name = "overflow";
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(*res_idx)++;
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}
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flags = tbl_msc->error_interrupt_flags;
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if (flags & ACPI_MPAM_MSC_IRQ_AFFINITY_VALID &&
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flags & ACPI_MPAM_MSC_IRQ_AFFINITY_PROCESSOR_CONTAINER)
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aff = tbl_msc->error_interrupt_affinity;
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else
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aff = ~0;
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if (frob_irq(pdev, tbl_msc->error_interrupt, flags, &irq, aff)) {
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res[*res_idx].start = irq;
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res[*res_idx].end = irq;
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res[*res_idx].flags = IORESOURCE_IRQ;
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res[*res_idx].name = "error";
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(*res_idx)++;
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}
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}
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static int acpi_mpam_parse_resource(struct mpam_msc *msc,
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struct acpi_mpam_resource_node *res)
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{
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u32 cache_id;
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int level;
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switch (res->locator_type) {
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case ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE:
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cache_id = res->locator.cache_locator.cache_reference;
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level = find_acpi_cache_level_from_id(cache_id);
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if (level < 0) {
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pr_err_once("Bad level for cache with id %u\n", cache_id);
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return level;
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}
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return mpam_ris_create(msc, res->ris_index, MPAM_CLASS_CACHE,
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level, cache_id);
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case ACPI_MPAM_LOCATION_TYPE_MEMORY:
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return mpam_ris_create(msc, res->ris_index, MPAM_CLASS_MEMORY,
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255, res->locator.memory_locator.proximity_domain);
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default:
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/* These get discovered later and treated as unknown */
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return 0;
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}
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}
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int acpi_mpam_parse_resources(struct mpam_msc *msc,
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struct acpi_mpam_msc_node *tbl_msc)
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{
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int i, err;
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struct acpi_mpam_resource_node *resources;
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resources = (struct acpi_mpam_resource_node *)(tbl_msc + 1);
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for (i = 0; i < tbl_msc->num_resouce_nodes; i++) {
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err = acpi_mpam_parse_resource(msc, &resources[i]);
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if (err)
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return err;
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}
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return 0;
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}
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static bool __init parse_msc_pm_link(struct acpi_mpam_msc_node *tbl_msc,
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struct platform_device *pdev,
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u32 *acpi_id)
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{
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bool acpi_id_valid = false;
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struct acpi_device *buddy;
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char hid[16], uid[16];
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int err;
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memset(&hid, 0, sizeof(hid));
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memcpy(hid, &tbl_msc->hardware_id_linked_device,
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sizeof(tbl_msc->hardware_id_linked_device));
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if (!strcmp(hid, ACPI_PROCESSOR_CONTAINER_HID)) {
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*acpi_id = tbl_msc->instance_id_linked_device;
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acpi_id_valid = true;
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}
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err = snprintf(uid, sizeof(uid), "%u",
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tbl_msc->instance_id_linked_device);
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if (err < 0 || err >= sizeof(uid))
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return acpi_id_valid;
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buddy = acpi_dev_get_first_match_dev(hid, uid, -1);
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if (buddy) {
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device_link_add(&pdev->dev, &buddy->dev, DL_FLAG_STATELESS);
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}
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return acpi_id_valid;
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}
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static int decode_interface_type(struct acpi_mpam_msc_node *tbl_msc,
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enum mpam_msc_iface *iface)
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{
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switch (tbl_msc->interface_type){
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case 0:
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*iface = MPAM_IFACE_MMIO;
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return 0;
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case 1:
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*iface = MPAM_IFACE_PCC;
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return 0;
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default:
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return -EINVAL;
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}
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}
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static int __init _parse_table(struct acpi_table_header *table)
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{
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char *table_end, *table_offset = (char *)(table + 1);
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struct property_entry props[4]; /* needs a sentinel */
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struct acpi_mpam_msc_node *tbl_msc;
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int next_res, next_prop, err = 0;
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struct acpi_device *companion;
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struct platform_device *pdev;
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enum mpam_msc_iface iface;
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struct resource res[3];
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char uid[16];
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u32 acpi_id;
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table_end = (char *)table + table->length;
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while (table_offset < table_end) {
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tbl_msc = (struct acpi_mpam_msc_node *)table_offset;
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table_offset += tbl_msc->length;
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/*
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* If any of the reserved fields are set, make no attempt to
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* parse the msc structure. This will prevent the driver from
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* probing all the MSC, meaning it can't discover the system
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* wide supported partid and pmg ranges. This avoids whatever
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* this MSC is truncating the partids and creating a screaming
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* error interrupt.
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*/
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if (tbl_msc->reserved || tbl_msc->reserved1 || tbl_msc->reserved2)
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continue;
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if (decode_interface_type(tbl_msc, &iface))
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continue;
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next_res = 0;
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next_prop = 0;
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memset(res, 0, sizeof(res));
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memset(props, 0, sizeof(props));
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pdev = platform_device_alloc("mpam_msc", tbl_msc->identifier);
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if (IS_ERR(pdev)) {
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err = PTR_ERR(pdev);
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break;
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}
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if (tbl_msc->length < sizeof(*tbl_msc)) {
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err = -EINVAL;
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break;
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}
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/* Some power management is described in the namespace: */
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err = snprintf(uid, sizeof(uid), "%u", tbl_msc->identifier);
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if (err > 0 && err < sizeof(uid)) {
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companion = acpi_dev_get_first_match_dev("ARMHAA5C", uid, -1);
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if (companion)
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ACPI_COMPANION_SET(&pdev->dev, companion);
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}
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if (iface == MPAM_IFACE_MMIO) {
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res[next_res].name = "MPAM:MSC";
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res[next_res].start = tbl_msc->base_address;
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res[next_res].end = tbl_msc->base_address + tbl_msc->mmio_size - 1;
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res[next_res].flags = IORESOURCE_MEM;
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next_res++;
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} else if (iface == MPAM_IFACE_PCC) {
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props[next_prop++] = PROPERTY_ENTRY_U32("pcc-channel",
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tbl_msc->base_address);
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next_prop++;
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}
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acpi_mpam_parse_irqs(pdev, tbl_msc, res, &next_res);
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err = platform_device_add_resources(pdev, res, next_res);
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if (err)
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break;
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props[next_prop++] = PROPERTY_ENTRY_U32("arm,not-ready-us",
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tbl_msc->max_nrdy_usec);
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/*
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* The MSC's CPU affinity is described via its linked power
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* management device, but only if it points at a Processor or
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* Processor Container.
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*/
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if (parse_msc_pm_link(tbl_msc, pdev, &acpi_id)) {
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props[next_prop++] = PROPERTY_ENTRY_U32("cpu_affinity",
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acpi_id);
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}
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err = device_create_managed_software_node(&pdev->dev, props,
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NULL);
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if (err)
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break;
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/* Come back later if you want the RIS too */
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err = platform_device_add_data(pdev, tbl_msc, tbl_msc->length);
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if (err)
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break;
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platform_device_add(pdev);
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}
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if (err)
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platform_device_put(pdev);
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return err;
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}
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static struct acpi_table_header *get_table(void)
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{
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struct acpi_table_header *table;
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acpi_status status;
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if (acpi_disabled || !mpam_cpus_have_feature())
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return NULL;
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status = acpi_get_table(ACPI_SIG_MPAM, 0, &table);
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if (ACPI_FAILURE(status))
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return NULL;
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if (table->revision != 1)
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return NULL;
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return table;
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}
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static int __init acpi_mpam_parse(void)
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{
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struct acpi_table_header *mpam;
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int err;
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mpam = get_table();
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if (!mpam)
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return 0;
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err = _parse_table(mpam);
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acpi_put_table(mpam);
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return err;
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}
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static int _count_msc(struct acpi_table_header *table)
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{
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char *table_end, *table_offset = (char *)(table + 1);
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struct acpi_mpam_msc_node *tbl_msc;
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int ret = 0;
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tbl_msc = (struct acpi_mpam_msc_node *)table_offset;
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table_end = (char *)table + table->length;
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while (table_offset < table_end) {
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if (tbl_msc->length < sizeof(*tbl_msc))
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return -EINVAL;
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ret++;
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table_offset += tbl_msc->length;
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tbl_msc = (struct acpi_mpam_msc_node *)table_offset;
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}
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return ret;
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}
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int acpi_mpam_count_msc(void)
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{
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struct acpi_table_header *mpam;
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int ret;
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mpam = get_table();
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if (!mpam)
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return 0;
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ret = _count_msc(mpam);
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acpi_put_table(mpam);
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return ret;
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}
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/*
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* Call after ACPI devices have been created, which happens behind acpi_scan_init()
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* called from subsys_initcall(). PCC requires the mailbox driver, which is
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* initialised from postcore_initcall().
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*/
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subsys_initcall_sync(acpi_mpam_parse);
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