64 lines
1.4 KiB
C
64 lines
1.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/errno.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/time.h>
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#include <linux/clk-provider.h>
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#include <asm/debug.h>
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#include <asm/timer.h>
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#include "proto.h"
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DEFINE_SPINLOCK(rtc_lock);
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EXPORT_SYMBOL(rtc_lock);
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#define TICK_SIZE (tick_nsec / 1000)
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/*
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* Shift amount by which scaled_ticks_per_cycle is scaled. Shifting
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* by 48 gives us 16 bits for HZ while keeping the accuracy good even
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* for large CPU clock rates.
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*/
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#define FIX_SHIFT 48
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unsigned long est_cycle_freq;
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#ifdef CONFIG_IRQ_WORK
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DEFINE_PER_CPU(u8, irq_work_pending);
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#define set_irq_work_pending_flag() __this_cpu_write(irq_work_pending, 1)
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#define test_irq_work_pending() __this_cpu_read(irq_work_pending)
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#define clear_irq_work_pending() __this_cpu_write(irq_work_pending, 0)
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void arch_irq_work_raise(void)
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{
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set_irq_work_pending_flag();
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}
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#else /* CONFIG_IRQ_WORK */
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#define test_irq_work_pending() 0
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#define clear_irq_work_pending()
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#endif /* CONFIG_IRQ_WORK */
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void __init
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time_init(void)
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{
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unsigned long cycle_freq;
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cycle_freq = get_cpu_freq();
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pr_info("CPU Cycle frequency = %ld Hz\n", cycle_freq);
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/* Register clocksource */
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sw64_setup_clocksource();
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of_clk_init(NULL);
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/* Startup the timer source. */
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sw64_setup_timer();
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/* Calibrate the delay loop directly */
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lpj_fine = cycle_freq / HZ;
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}
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