144 lines
5.0 KiB
ReStructuredText
144 lines
5.0 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0
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============================================================
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Linux Kernel Driver for Huawei Intelligent NIC(HiNIC3) family
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============================================================
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Overview:
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=========
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HiNIC3 is a network interface card for the Data Center Area.
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The driver supports a range of link-speed devices (10GbE, 25GbE, 40GbE, etc.).
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The driver supports also a negotiated and extendable feature set.
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Some HiNIC3 devices support SR-IOV. This driver is used for Physical Function
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(PF).
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HiNIC3 devices support MSI-X interrupt vector for each Tx/Rx queue and
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adaptive interrupt moderation.
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HiNIC3 devices support also various offload features such as checksum offload,
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TCP Transmit Segmentation Offload(TSO), Receive-Side Scaling(RSS) and
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LRO(Large Receive Offload).
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Supported PCI vendor ID/device IDs:
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===================================
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19e5:1822 - HiNIC3 PF
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Driver Architecture and Source Code:
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====================================
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hinic3_dev - Implement a Logical Network device that is independent from
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specific HW details about HW data structure formats.
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hinic3_hwdev - Implement the HW details of the device and include the components
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for accessing the PCI NIC.
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hinic3_hwdev contains the following components:
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===============================================
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HW Interface:
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=============
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The interface for accessing the pci device (DMA memory and PCI BARs).
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(hinic3_hw_if.c, hinic3_hw_if.h)
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Configuration Status Registers Area that describes the HW Registers on the
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configuration and status BAR0. (hinic3_hw_csr.h)
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MGMT components:
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================
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Asynchronous Event Queues(AEQs) - The event queues for receiving messages from
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the MGMT modules on the cards. (hinic3_hw_eqs.c, hinic3_hw_eqs.h)
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Application Programmable Interface commands(API CMD) - Interface for sending
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MGMT commands to the card. (hinic3_hw_api_cmd.c, hinic3_hw_api_cmd.h)
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Management (MGMT) - the PF to MGMT channel that uses API CMD for sending MGMT
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commands to the card and receives notifications from the MGMT modules on the
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card by AEQs. Also set the addresses of the IO CMDQs in HW.
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(hinic3_hw_mgmt.c, hinic3_hw_mgmt.h)
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IO components:
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==============
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Completion Event Queues(CEQs) - The completion Event Queues that describe IO
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tasks that are finished. (hinic3_hw_eqs.c, hinic3_hw_eqs.h)
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Work Queues(WQ) - Contain the memory and operations for use by CMD queues and
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the Queue Pairs. The WQ is a Memory Block in a Page. The Block contains
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pointers to Memory Areas that are the Memory for the Work Queue Elements(WQEs).
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(hinic3_hw_wq.c, hinic3_hw_wq.h)
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Command Queues(CMDQ) - The queues for sending commands for IO management and is
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used to set the QPs addresses in HW. The commands completion events are
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accumulated on the CEQ that is configured to receive the CMDQ completion events.
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(hinic3_hw_cmdq.c, hinic3_hw_cmdq.h)
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Queue Pairs(QPs) - The HW Receive and Send queues for Receiving and Transmitting
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Data. (hinic3_hw_qp.c, hinic3_hw_qp.h, hinic3_hw_qp_ctxt.h)
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IO - de/constructs all the IO components. (hinic3_hw_io.c, hinic3_hw_io.h)
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CQM components:
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==========
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The CQM module organizes the memory in the large system in a format (CLA table)
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and allocates the memory to the chip (BAT table). The chip can use the memory in
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the large system to save context information and queue information (SCQ\SRQ).
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(cqm_bat_cla.c, cqm_bat_cla.h, cqm_bitmap_table.c, cqm_bitmap_table.h)
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When a packet is transmitted from the PCIe link, the chip parses the 5-tuple
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such as sid, did, and hostid. Fill the parsed data in the queue
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(in the form of scqe). In this way, the driver can directly obtain data from the
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queue (through MPDK polling) and then process the data. In this way, the
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uninstallation is implemented.
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(cqm_main.c, cqm_main.h, cqm_db.c, cqm_db.h)
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HW device:
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==========
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HW device - de/constructs the HW Interface, the MGMT components on the
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initialization of the driver and the IO components on the case of Interface
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UP/DOWN Events. (hinic3_hw_dev.c, hinic3_hw_dev.h)
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hinic3_dev contains the following components:
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===============================================
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PCI ID table - Contains the supported PCI Vendor/Device IDs.
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(hinic3_pci_tbl.h)
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Port Commands - Send commands to the HW device for port management
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(MAC, Vlan, MTU, ...). (hinic3_port.c, hinic3_port.h)
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Tx Queues - Logical Tx Queues that use the HW Send Queues for transmit.
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The Logical Tx queue is not dependent on the format of the HW Send Queue.
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(hinic3_tx.c, hinic3_tx.h)
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Rx Queues - Logical Rx Queues that use the HW Receive Queues for receive.
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The Logical Rx queue is not dependent on the format of the HW Receive Queue.
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(hinic3_rx.c, hinic3_rx.h)
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hinic_dev - de/constructs the Logical Tx and Rx Queues.
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(hinic3_main.c, hinic3_dev.h)
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Miscellaneous:
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=============
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Common functions that are used by HW and Logical Device.
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(hinic3_common.c, hinic3_common.h)
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Support
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=======
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If an issue is identified with the released source code on the supported kernel
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with a supported adapter, email the specific information related to the issue to
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wulike1@huawei.com.
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