332 lines
6.4 KiB
Plaintext
332 lines
6.4 KiB
Plaintext
/dts-v1/;
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/plugin/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include <dt-bindings/display/drm_mipi_dsi.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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fragment@0 {
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target = <&mipi_dcphy1>;
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__overlay__ {
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status = "okay";
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};
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};
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fragment@1 {
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target = <&route_dsi1>;
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__overlay__ {
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status = "okay";
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connect = <&vp3_out_dsi1>;
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};
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};
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fragment@2 {
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target = <&dsi1_in_vp3>;
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__overlay__ {
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status = "okay";
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};
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};
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fragment@3 {
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target = <&dsi1>;
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__overlay__ {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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dsi1_panel: panel@0 {
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status = "okay";
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compatible = "simple-panel-dsi";
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reg = <0>;
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backlight = <&backlight_dsi1>;
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power-supply = <&mipi_dsi1_power>;
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reset-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>;
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enable-delay-ms = <35>;
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prepare-delay-ms = <6>;
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reset-delay-ms = <0>;
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init-delay-ms = <20>;
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unprepare-delay-ms = <0>;
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disable-delay-ms = <20>;
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size,width = <74>;
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size,height = <133>;
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dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
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dsi,format = <MIPI_DSI_FMT_RGB888>;
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dsi,lanes = <4>;
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panel-init-sequence = [
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39 05 04 FF 98 81 03
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15 05 02 01 00
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15 05 02 02 00
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15 05 02 03 53
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15 05 02 04 D3
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15 05 02 05 00
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15 05 02 06 0D
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15 05 02 07 08
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15 05 02 08 00
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15 05 02 09 00
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15 05 02 0a 00
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15 05 02 0b 00
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15 05 02 0c 00
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15 05 02 0d 00
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15 05 02 0e 00
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15 05 02 0f 28
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15 05 02 10 28
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15 05 02 11 00
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15 05 02 12 00
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15 05 02 13 00
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15 05 02 14 00
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15 05 02 15 00
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15 05 02 16 00
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15 05 02 17 00
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15 05 02 18 00
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15 05 02 19 00
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15 05 02 1a 00
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15 05 02 1b 00
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15 05 02 1d 00
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15 05 02 1e 40
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15 05 02 1f 80
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15 05 02 20 06
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15 05 02 21 01
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15 05 02 22 00
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15 05 02 23 00
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15 05 02 24 00
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15 05 02 25 00
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15 05 02 26 00
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15 05 02 27 00
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15 05 02 28 33
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15 05 02 29 33
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15 05 02 2a 00
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15 05 02 2b 00
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15 05 02 2c 00
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15 05 02 2d 00
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15 05 02 2e 00
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15 05 02 2f 00
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15 05 02 30 00
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15 05 02 31 00
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15 05 02 32 00
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15 05 02 33 00
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15 05 02 34 03
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15 05 02 35 00
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15 05 02 36 00
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15 05 02 37 00
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15 05 02 38 96
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15 05 02 39 00
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15 05 02 3a 00
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15 05 02 3b 00
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15 05 02 3c 00
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15 05 02 3d 00
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15 05 02 3e 00
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15 05 02 3f 00
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15 05 02 40 00
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15 05 02 41 00
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15 05 02 42 00
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15 05 02 43 00
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15 05 02 44 00
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15 05 02 50 00
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15 05 02 51 23
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15 05 02 52 45
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15 05 02 53 67
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15 05 02 54 89
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15 05 02 55 AB
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15 05 02 56 01
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15 05 02 57 23
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15 05 02 58 45
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15 05 02 59 67
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15 05 02 5a 89
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15 05 02 5b AB
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15 05 02 5c CD
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15 05 02 5d EF
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15 05 02 5e 00
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15 05 02 5f 08
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15 05 02 60 08
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15 05 02 61 06
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15 05 02 62 06
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15 05 02 63 01
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15 05 02 64 01
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15 05 02 65 00
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15 05 02 66 00
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15 05 02 67 02
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15 05 02 68 15
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15 05 02 69 15
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15 05 02 6a 14
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15 05 02 6b 14
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15 05 02 6c 0D
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15 05 02 6d 0D
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15 05 02 6e 0C
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15 05 02 6f 0C
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15 05 02 70 0F
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15 05 02 71 0F
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15 05 02 72 0E
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15 05 02 73 0E
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15 05 02 74 02
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15 05 02 75 08
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15 05 02 76 08
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15 05 02 77 06
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15 05 02 78 06
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15 05 02 79 01
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15 05 02 7a 01
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15 05 02 7b 00
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15 05 02 7c 00
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15 05 02 7d 02
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15 05 02 7e 15
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15 05 02 7f 15
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15 05 02 80 14
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15 05 02 81 14
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15 05 02 82 0D
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15 05 02 83 0D
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15 05 02 84 0C
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15 05 02 85 0C
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15 05 02 86 0F
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15 05 02 87 0F
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15 05 02 88 0E
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15 05 02 89 0E
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15 05 02 8A 02
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39 05 04 FF 98 81 04
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15 05 02 6E 2B
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15 05 02 6F 37
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15 05 02 3A 24
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15 05 02 8D 1A
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15 05 02 87 BA
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15 05 02 B2 D1
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15 05 02 88 0B
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15 05 02 38 01
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15 05 02 39 00
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15 05 02 B5 02
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15 05 02 31 25
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15 05 02 3B 98
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39 05 04 FF 98 81 01
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15 05 02 22 0A
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15 05 02 31 00
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15 05 02 53 3D
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15 05 02 55 3D
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15 05 02 50 B5
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15 05 02 51 AD
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15 05 02 60 06
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15 05 02 62 20
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15 05 02 A0 00
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15 05 02 A1 21
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15 05 02 A2 35
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15 05 02 A3 19
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15 05 02 A4 1E
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15 05 02 A5 33
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15 05 02 A6 27
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15 05 02 A7 26
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15 05 02 A8 AF
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15 05 02 A9 1B
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15 05 02 AA 27
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15 05 02 AB 8D
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15 05 02 AC 1A
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15 05 02 AD 1B
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15 05 02 AE 50
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15 05 02 AF 26
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15 05 02 B0 2B
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15 05 02 B1 54
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15 05 02 B2 5E
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15 05 02 B3 23
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15 05 02 C0 00
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15 05 02 C1 21
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15 05 02 C2 35
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15 05 02 C3 19
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15 05 02 C4 1E
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15 05 02 C5 33
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15 05 02 C6 27
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15 05 02 C7 26
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15 05 02 C8 AF
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15 05 02 C9 1B
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15 05 02 CA 27
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15 05 02 CB 8D
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15 05 02 CC 1A
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15 05 02 CD 1B
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15 05 02 CE 50
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15 05 02 CF 26
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15 05 02 D0 2B
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15 05 02 D1 54
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15 05 02 D2 5E
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15 05 02 D3 23
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39 05 04 FF 98 81 00
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15 78 02 11 00
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15 05 02 29 00
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];
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panel-exit-sequence = [
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05 78 01 28
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05 00 01 10
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];
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disp1_timings0: display-timings {
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native-mode = <&dsi1_timing0>;
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dsi1_timing0: timing0 {
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clock-frequency = <67000000>;
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hactive = <800>;
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vactive = <1280>;
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hsync-len = <24>;
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hback-porch = <24>;
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hfront-porch = <12>;
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vsync-len = <2>;
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vback-porch = <9>;
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vfront-porch = <7>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <0>;
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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panel_in_dsi1: endpoint {
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remote-endpoint = <&dsi1_out_panel>;
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};
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};
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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dsi1_out_panel: endpoint {
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remote-endpoint = <&panel_in_dsi1>;
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};
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};
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};
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};
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};
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fragment@4 {
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target = <&i2c6>;
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__overlay__ {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c6m3_xfer>;
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gt911_dsi1: gt911@5d {
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status = "okay";
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compatible = "goodix,gt911";
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reg = <0x5d>;
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interrupt-parent = <&gpio3>;
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interrupts = <RK_PC4 IRQ_TYPE_LEVEL_LOW>;
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reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_LOW>;
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irq-gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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};
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