42 lines
836 B
C
42 lines
836 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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// Copyright (c) 2022 Hisilicon Limited.
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#ifndef __HNS3_ROH_DEVICE_H__
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#define __HNS3_ROH_DEVICE_H__
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enum hns3_roh_state {
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HNS3_ROH_STATE_RESETTING,
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HNS3_ROH_STATE_INIT,
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HNS3_ROH_STATE_INITED,
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HNS3_ROH_STATE_DOWN,
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HNS3_ROH_STATE_CMD_DISABLE,
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};
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enum { HNS3_ROH_RST_DIRECT_RETURN = 0 };
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enum hns3_roh_link_type {
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HNS3_ROH_LINK_STATUS_DOWN = 0,
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HNS3_ROH_LINK_STATUS_UP
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};
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enum hns3_roh_dev_sw_state {
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HNS3_ROH_SW_STATE_MBX_SERVICE_SCHED,
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HNS3_ROH_SW_STATE_MBX_HANDLING,
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HNS3_ROH_SW_STATE_LINK_UPDATING,
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HNS3_ROH_SW_STATE_MAX
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};
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enum hns3_roh_event_type {
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HNS3_ROH_VECTOR0_EVENT_MBX,
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HNS3_ROH_VECTOR0_EVENT_OTHER
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};
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enum hns3_roh_link_fail_code {
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HNS3_ROH_LF_NORMAL = 0,
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HNS3_ROH_LF_REF_CLOCK_LOST = 1,
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HNS3_ROH_LF_XSFP_TX_DISABLE = 2,
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HNS3_ROH_LF_XSFP_ABSENT = 3
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};
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#endif
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