675 lines
17 KiB
C
675 lines
17 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* Copyright(c) 2022 - 2024 Mucse Corporation. */
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <linux/sched.h>
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#include <linux/mdio.h>
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#include "rnpm_common.h"
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#include "rnpm_phy.h"
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#include "rnpm_mbx_fw.h"
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#define RNPM_PHY_REVISION_MASK 0xFFFFFFF0
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#define RNPM_MAX_PHY_ADDR 32
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static void rnpm_i2c_start(struct rnpm_hw *hw);
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static void rnpm_i2c_stop(struct rnpm_hw *hw);
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static s32 rnpm_clock_in_i2c_byte(struct rnpm_hw *hw, u8 *data);
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static s32 rnpm_clock_out_i2c_byte(struct rnpm_hw *hw, u8 data);
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static s32 rnpm_get_i2c_ack(struct rnpm_hw *hw);
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static s32 rnpm_clock_in_i2c_bit(struct rnpm_hw *hw, bool *data);
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static s32 rnpm_clock_out_i2c_bit(struct rnpm_hw *hw, bool data);
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static void rnpm_raise_i2c_clk(struct rnpm_hw *hw, u32 *i2cctl);
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static void rnpm_lower_i2c_clk(struct rnpm_hw *hw, u32 *i2cctl);
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static s32 rnpm_set_i2c_data(struct rnpm_hw *hw, u32 *i2cctl, bool data);
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static bool rnpm_get_i2c_data(u32 *i2cctl);
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static void rnpm_i2c_bus_clear(struct rnpm_hw *hw);
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static enum rnpm_phy_type rnpm_get_phy_type_from_id(u32 phy_id);
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static s32 rnpm_get_phy_id(struct rnpm_hw *hw);
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/**
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* rnpm_identify_phy_generic - Get physical layer module
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* @hw: pointer to hardware structure
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*
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* Determines the physical layer module found on the current adapter.
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**/
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s32 rnpm_identify_phy_generic(struct rnpm_hw *hw)
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{
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s32 status = RNPM_ERR_PHY_ADDR_INVALID;
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return status;
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}
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/**
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* rnpm_get_phy_id - Get the phy type
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* @hw: pointer to hardware structure
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*
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**/
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__maybe_unused static s32 rnpm_get_phy_id(struct rnpm_hw *hw)
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{
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u32 status;
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u16 phy_id_high = 0;
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u16 phy_id_low = 0;
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status = hw->phy.ops.read_reg(hw, MDIO_DEVID1, MDIO_MMD_PMAPMD,
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&phy_id_high);
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if (status == 0) {
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hw->phy.id = (u32)(phy_id_high << 16);
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status = hw->phy.ops.read_reg(hw, MDIO_DEVID2, MDIO_MMD_PMAPMD,
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&phy_id_low);
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hw->phy.id |= (u32)(phy_id_low & RNPM_PHY_REVISION_MASK);
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hw->phy.revision = (u32)(phy_id_low & ~RNPM_PHY_REVISION_MASK);
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}
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return status;
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}
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/**
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* rnpm_get_phy_type_from_id - Get the phy type
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* @hw: pointer to hardware structure
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*
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**/
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__maybe_unused static enum rnpm_phy_type rnpm_get_phy_type_from_id(u32 phy_id)
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{
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enum rnpm_phy_type phy_type = rnpm_phy_unknown;
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return phy_type;
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}
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/**
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* rnpm_reset_phy_generic - Performs a PHY reset
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* @hw: pointer to hardware structure
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**/
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s32 rnpm_reset_phy_generic(struct rnpm_hw *hw)
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{
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s32 status = 0;
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return status;
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}
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/**
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* rnpm_read_phy_reg_generic - Reads a value from a specified PHY register
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* @hw: pointer to hardware structure
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* @reg_addr: 32 bit address of PHY register to read
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* @phy_data: Pointer to read data from PHY register
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**/
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s32 rnpm_read_phy_reg_generic(struct rnpm_hw *hw, u32 reg_addr, u32 device_type,
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u16 *phy_data)
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{
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s32 status = 0;
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u32 data = 0;
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status = rnpm_mbx_phy_read(hw, reg_addr, &data);
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*phy_data = data & 0xffff;
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return status;
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}
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/**
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* rnpm_write_phy_reg_generic - Writes a value to specified PHY register
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* @hw: pointer to hardware structure
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* @reg_addr: 32 bit PHY register to write
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* @device_type: 5 bit device type
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* @phy_data: Data to write to the PHY register
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**/
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s32 rnpm_write_phy_reg_generic(struct rnpm_hw *hw, u32 reg_addr,
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u32 device_type, u16 phy_data)
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{
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s32 status = 0;
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status = rnpm_mbx_phy_write(hw, reg_addr, (u32)phy_data);
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return status;
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}
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/**
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* rnpm_setup_phy_link_generic - Set and restart autoneg
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* @hw: pointer to hardware structure
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*
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* Restart autonegotiation and PHY and waits for completion.
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**/
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s32 rnpm_setup_phy_link_generic(struct rnpm_hw *hw)
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{
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s32 status = 0;
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rnpm_mbx_phy_link_set(hw, hw->phy.autoneg_advertised);
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return status;
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}
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/**
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* rnpm_setup_phy_link_speed_generic - Sets the auto advertised capabilities
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* @hw: pointer to hardware structure
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* @speed: new link speed
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**/
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s32 rnpm_setup_phy_link_speed_generic(struct rnpm_hw *hw, rnpm_link_speed speed,
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bool autoneg_wait_to_complete)
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{
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struct rnpm_adapter *adpt = hw->back;
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u32 value = 0;
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u32 value_r4 = 0;
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u32 value_r9 = 0;
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rnpm_logd(LOG_PHY,
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"%s setup phy: phy_addr=%d speed=%d duplex=%d autoneg=%d ",
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__func__, adpt->phy_addr, speed, hw->mac.duplex,
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hw->mac.autoneg);
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rnpm_logd(LOG_PHY, "is_backplane=%d is_sgmii=%d mdix=%d\n",
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hw->is_backplane, hw->is_sgmii, hw->phy.mdix);
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if (hw->is_backplane) {
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/* Backplane type, support AN, unsupport set speed */
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return rnpm_set_lane_fun(hw, LANE_FUN_AN, hw->mac.autoneg, 0, 0,
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0);
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}
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/* Fiber only support force speed 1G/10G*/
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if (!hw->is_sgmii) {
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if (adpt->pf_adapter->force_10g_1g_speed_ablity) {
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rnpm_mbx_force_speed(hw, speed);
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/* Update port link info when firber is absent */
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set_bit(RNPM_PF_LINK_CHANGE, &adpt->pf_adapter->flags);
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}
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return 0;
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}
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/* Set MDI/MDIX mode */
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rnpm_mbx_phy_read(hw, RNPM_YT8531_PHY_SPEC_CTRL, &value);
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value &= ~RNPM_YT8531_PHY_SPEC_CTRL_MDIX_CFG_MASK;
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/* Options: 0: Auto (default) 1: MDI mode 2: MDI-X mode */
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switch (hw->phy.mdix) {
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case 1:
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break;
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case 2:
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value |= RNPM_YT8531_PHY_SPEC_CTRL_FORCE_MDIX;
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break;
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case 0:
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default:
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value |= RNPM_YT8531_PHY_SPEC_CTRL_AUTO_MDI_MDIX;
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break;
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}
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rnpm_mbx_phy_write(hw, RNPM_YT8531_PHY_SPEC_CTRL, value);
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if (speed == RNPM_LINK_SPEED_UNKNOWN) {
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rnpm_mbx_phy_read(hw, 0x0, &value);
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value |= RNPM_MDI_PHY_RESET;
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rnpm_mbx_phy_write(hw, 0x0, value);
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goto skip_an;
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}
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/* Clear autoneg_advertised and set new values based on input link
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* speed.
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*/
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hw->phy.autoneg_advertised = speed;
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if (!hw->mac.autoneg) {
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switch (speed) {
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case RNPM_LINK_SPEED_1GB_FULL:
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case RNPM_LINK_SPEED_1GB_HALF:
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value = RNPM_MDI_PHY_SPEED_SELECT1;
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// if (hw->phy.id == RNPM_YT8531_PHY_ID) {
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speed = RNPM_LINK_SPEED_1GB_FULL;
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goto out;
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// }
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break;
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case RNPM_LINK_SPEED_100_FULL:
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case RNPM_LINK_SPEED_100_HALF:
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value = RNPM_MDI_PHY_SPEED_SELECT0;
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break;
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case RNPM_LINK_SPEED_10_FULL:
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case RNPM_LINK_SPEED_10_HALF:
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value = 0;
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break;
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default:
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value = RNPM_MDI_PHY_SPEED_SELECT0 |
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RNPM_MDI_PHY_SPEED_SELECT1;
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hw_dbg(hw, "unknown speed = 0x%x.\n", speed);
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break;
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}
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/* duplex full */
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if (hw->mac.duplex)
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value |= RNPM_MDI_PHY_DUPLEX;
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value |= RNPM_MDI_PHY_RESET;
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value &= ~RNPM_MDI_PHY_ANE;
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rnpm_mbx_phy_write(hw, 0x0, value);
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goto skip_an;
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}
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// start_an:
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value_r4 = 0x1E0;
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value_r9 = 0x300;
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/*disable 100/10base-T Self-negotiation ability*/
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rnpm_mbx_phy_read(hw, 0x4, &value);
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value &= ~value_r4;
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rnpm_mbx_phy_write(hw, 0x4, value);
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/*disable 1000base-T Self-negotiation ability*/
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rnpm_mbx_phy_read(hw, 0x9, &value);
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value &= ~value_r9;
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rnpm_mbx_phy_write(hw, 0x9, value);
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value_r4 = 0x0;
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value_r9 = 0x0;
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if (speed & RNPM_LINK_SPEED_1GB_FULL) {
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hw->phy.autoneg_advertised |= RNPM_LINK_SPEED_1GB_FULL;
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value_r9 |= 0x200;
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}
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if (speed & RNPM_LINK_SPEED_100_FULL) {
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hw->phy.autoneg_advertised |= RNPM_LINK_SPEED_100_FULL;
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value_r4 |= 0x100;
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}
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if (speed & RNPM_LINK_SPEED_10_FULL) {
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hw->phy.autoneg_advertised |= RNPM_LINK_SPEED_10_FULL;
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value_r4 |= 0x40;
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}
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if (speed & RNPM_LINK_SPEED_1GB_HALF) {
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hw->phy.autoneg_advertised |= RNPM_LINK_SPEED_1GB_HALF;
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value_r9 |= 0x100;
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}
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if (speed & RNPM_LINK_SPEED_100_HALF) {
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hw->phy.autoneg_advertised |= RNPM_LINK_SPEED_100_HALF;
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value_r4 |= 0x80;
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}
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if (speed & RNPM_LINK_SPEED_10_HALF) {
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hw->phy.autoneg_advertised |= RNPM_LINK_SPEED_10_HALF;
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value_r4 |= 0x20;
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}
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/* enable 1000base-T Self-negotiation ability */
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rnpm_mbx_phy_read(hw, 0x9, &value);
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value |= value_r9;
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rnpm_mbx_phy_write(hw, 0x9, value);
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/* enable 100/10base-T Self-negotiation ability */
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rnpm_mbx_phy_read(hw, 0x4, &value);
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value |= value_r4;
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rnpm_mbx_phy_write(hw, 0x4, value);
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/* software reset to make the above configuration take effect*/
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rnpm_mbx_phy_read(hw, 0x0, &value);
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value |= 0x9200;
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rnpm_mbx_phy_write(hw, 0x0, value);
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skip_an:
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/* power on in UTP mode */
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rnpm_mbx_phy_read(hw, 0x0, &value);
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value &= ~0x800;
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rnpm_mbx_phy_write(hw, 0x0, value);
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out:
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return 0;
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}
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/**
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* rnpm_get_copper_link_capabilities_generic - Determines link capabilities
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* @hw: pointer to hardware structure
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* @speed: pointer to link speed
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* @autoneg: boolean auto-negotiation value
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*
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* Determines the link capabilities by reading the AUTOC register.
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*/
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s32 rnpm_get_copper_link_capabilities_generic(struct rnpm_hw *hw,
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rnpm_link_speed *speed,
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bool *autoneg)
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{
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s32 status = RNPM_ERR_LINK_SETUP;
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u16 speed_ability;
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*speed = 0;
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*autoneg = true;
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status = hw->phy.ops.read_reg(hw, MDIO_SPEED, MDIO_MMD_PMAPMD,
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&speed_ability);
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if (status == 0) {
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if (speed_ability & MDIO_SPEED_10G)
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*speed |= RNPM_LINK_SPEED_10GB_FULL;
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if (speed_ability & MDIO_PMA_SPEED_1000)
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*speed |= RNPM_LINK_SPEED_1GB_FULL;
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if (speed_ability & MDIO_PMA_SPEED_100)
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*speed |= RNPM_LINK_SPEED_100_FULL;
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}
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return status;
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}
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/**
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* rnpm_check_phy_link_tnx - Determine link and speed status
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* @hw: pointer to hardware structure
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*
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* Reads the VS1 register to determine if link is up and the current speed for
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* the PHY.
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**/
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s32 rnpm_check_phy_link_tnx(struct rnpm_hw *hw, rnpm_link_speed *speed,
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bool *link_up)
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{
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s32 status = 0;
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return status;
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}
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/**
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* rnpm_setup_phy_link_tnx - Set and restart autoneg
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* @hw: pointer to hardware structure
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*
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* Restart autonegotiation and PHY and waits for completion.
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**/
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s32 rnpm_setup_phy_link_tnx(struct rnpm_hw *hw)
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{
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s32 status = 0;
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return status;
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}
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/**
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* rnpm_get_phy_firmware_version_tnx - Gets the PHY Firmware Version
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* @hw: pointer to hardware structure
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* @firmware_version: pointer to the PHY Firmware Version
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**/
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s32 rnpm_get_phy_firmware_version_tnx(struct rnpm_hw *hw, u16 *firmware_version)
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{
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s32 status = 0;
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return status;
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}
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/**
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* rnpm_get_phy_firmware_version_generic - Gets the PHY Firmware Version
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* @hw: pointer to hardware structure
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* @firmware_version: pointer to the PHY Firmware Version
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**/
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s32 rnpm_get_phy_firmware_version_generic(struct rnpm_hw *hw,
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u16 *firmware_version)
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{
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s32 status = 0;
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return status;
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}
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/**
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* rnpm_reset_phy_nl - Performs a PHY reset
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* @hw: pointer to hardware structure
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**/
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s32 rnpm_reset_phy_nl(struct rnpm_hw *hw)
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{
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s32 ret_val = 0;
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return ret_val;
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}
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/**
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* rnpm_identify_sfp_module_generic - Identifies SFP modules
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* @hw: pointer to hardware structure
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*
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* Searches for and identifies the SFP module and assigns appropriate PHY type.
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**/
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s32 rnpm_identify_sfp_module_generic(struct rnpm_hw *hw)
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{
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return RNPM_ERR_SFP_NOT_PRESENT;
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}
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/**
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* rnpm_get_sfp_init_sequence_offsets - Provides offset of PHY init sequence
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* @hw: pointer to hardware structure
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* @list_offset: offset to the SFP ID list
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* @data_offset: offset to the SFP data block
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*
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* Checks the MAC's EEPROM to see if it supports a given SFP+ module type, if
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* so it returns the offsets to the phy init sequence block.
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**/
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s32 rnpm_get_sfp_init_sequence_offsets(struct rnpm_hw *hw, u16 *list_offset,
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u16 *data_offset)
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{
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return 0;
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}
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/**
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* rnpm_read_i2c_eeprom_generic - Reads 8 bit EEPROM word over I2C interface
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* @hw: pointer to hardware structure
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* @byte_offset: EEPROM byte offset to read at address 0xA0
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* @eeprom_data: value read
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*
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* Performs byte read operation to SFP module's EEPROM over I2C interface.
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**/
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s32 rnpm_read_i2c_eeprom_generic(struct rnpm_hw *hw, u8 byte_offset,
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u8 *eeprom_data)
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{
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return -EIO;
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}
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/**
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* rnpm_read_i2c_sff8472_generic - Reads 8 bit word over I2C interface
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* @hw: pointer to hardware structure
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* @byte_offset: byte offset at address 0xA2
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* @eeprom_data: value read
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*
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* Performs byte read operation to SFP module's SFF-8472 data over I2C
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**/
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s32 rnpm_read_i2c_sff8472_generic(struct rnpm_hw *hw, u8 byte_offset,
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u8 *sff8472_data)
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{
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// *sff8472_data = rnpm_mbx_sfp_read(hw, RNPM_I2C_EEPROM_DEV_ADDR2,
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// byte_offset); return hw->phy.ops.read_i2c_byte(hw, byte_offset,
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// RNPM_I2C_EEPROM_DEV_ADDR2, sff8472_data);
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return -EIO;
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}
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/**
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* rnpm_write_i2c_eeprom_generic - Writes 8 bit EEPROM word over I2C interface
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* @hw: pointer to hardware structure
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* @byte_offset: EEPROM byte offset to write
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* @eeprom_data: value to write
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*
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* Performs byte write operation to SFP module's EEPROM over I2C interface.
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**/
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s32 rnpm_write_i2c_eeprom_generic(struct rnpm_hw *hw, u8 byte_offset,
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u8 eeprom_data)
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{
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// return hw->phy.ops.write_i2c_byte(hw, byte_offset,
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// RNPM_I2C_EEPROM_DEV_ADDR, eeprom_data);
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return -EIO;
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}
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/**
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* rnpm_read_i2c_byte_generic - Reads 8 bit word over I2C
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* @hw: pointer to hardware structure
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* @byte_offset: byte offset to read
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* @data: value read
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*
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* Performs byte read operation to SFP module's EEPROM over I2C interface at
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* a specified device address.
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**/
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s32 rnpm_read_i2c_byte_generic(struct rnpm_hw *hw, u8 byte_offset, u8 dev_addr,
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u8 *data)
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{
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s32 status = 0;
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return status;
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}
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/**
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* rnpm_write_i2c_byte_generic - Writes 8 bit word over I2C
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* @hw: pointer to hardware structure
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* @byte_offset: byte offset to write
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* @data: value to write
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*
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* Performs byte write operation to SFP module's EEPROM over I2C interface at
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* a specified device address.
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**/
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s32 rnpm_write_i2c_byte_generic(struct rnpm_hw *hw, u8 byte_offset, u8 dev_addr,
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u8 data)
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{
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s32 status = 0;
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return status;
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}
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/**
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* rnpm_i2c_start - Sets I2C start condition
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* @hw: pointer to hardware structure
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*
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* Sets I2C start condition (High -> Low on SDA while SCL is High)
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**/
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__maybe_unused static void rnpm_i2c_start(struct rnpm_hw *hw)
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{
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}
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/**
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* rnpm_i2c_stop - Sets I2C stop condition
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* @hw: pointer to hardware structure
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*
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* Sets I2C stop condition (Low -> High on SDA while SCL is High)
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**/
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__maybe_unused static void rnpm_i2c_stop(struct rnpm_hw *hw)
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{
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}
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/**
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* rnpm_clock_in_i2c_byte - Clocks in one byte via I2C
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* @hw: pointer to hardware structure
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* @data: data byte to clock in
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*
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* Clocks in one byte data via I2C data/clock
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**/
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__maybe_unused static s32 rnpm_clock_in_i2c_byte(struct rnpm_hw *hw, u8 *data)
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{
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s32 i;
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bool bit = false;
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for (i = 7; i >= 0; i--) {
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rnpm_clock_in_i2c_bit(hw, &bit);
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*data |= bit << i;
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}
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return 0;
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}
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/**
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* rnpm_clock_out_i2c_byte - Clocks out one byte via I2C
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* @hw: pointer to hardware structure
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* @data: data byte clocked out
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*
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* Clocks out one byte data via I2C data/clock
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**/
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__maybe_unused static s32 rnpm_clock_out_i2c_byte(struct rnpm_hw *hw, u8 data)
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{
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s32 status = 0;
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return status;
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}
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/**
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* rnpm_get_i2c_ack - Polls for I2C ACK
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* @hw: pointer to hardware structure
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*
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* Clocks in/out one bit via I2C data/clock
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**/
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__maybe_unused static s32 rnpm_get_i2c_ack(struct rnpm_hw *hw)
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{
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s32 status = 0;
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return status;
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}
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/**
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* rnpm_clock_in_i2c_bit - Clocks in one bit via I2C data/clock
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* @hw: pointer to hardware structure
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* @data: read data value
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*
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* Clocks in one bit via I2C data/clock
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**/
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__maybe_unused static s32 rnpm_clock_in_i2c_bit(struct rnpm_hw *hw, bool *data)
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|
{
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return 0;
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}
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|
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/**
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* rnpm_clock_out_i2c_bit - Clocks in/out one bit via I2C data/clock
|
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* @hw: pointer to hardware structure
|
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* @data: data value to write
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*
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* Clocks out one bit via I2C data/clock
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**/
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__maybe_unused static s32 rnpm_clock_out_i2c_bit(struct rnpm_hw *hw, bool data)
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{
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s32 status = 0;
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return status;
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}
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/**
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* rnpm_raise_i2c_clk - Raises the I2C SCL clock
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* @hw: pointer to hardware structure
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* @i2cctl: Current value of I2CCTL register
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*
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* Raises the I2C clock line '0'->'1'
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**/
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__maybe_unused static void rnpm_raise_i2c_clk(struct rnpm_hw *hw, u32 *i2cctl)
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|
{
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}
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/**
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* rnpm_lower_i2c_clk - Lowers the I2C SCL clock
|
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* @hw: pointer to hardware structure
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* @i2cctl: Current value of I2CCTL register
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*
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* Lowers the I2C clock line '1'->'0'
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**/
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__maybe_unused static void rnpm_lower_i2c_clk(struct rnpm_hw *hw, u32 *i2cctl)
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|
{
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}
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/**
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* rnpm_set_i2c_data - Sets the I2C data bit
|
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* @hw: pointer to hardware structure
|
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* @i2cctl: Current value of I2CCTL register
|
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* @data: I2C data value (0 or 1) to set
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*
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* Sets the I2C data bit
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**/
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__maybe_unused static s32 rnpm_set_i2c_data(struct rnpm_hw *hw, u32 *i2cctl,
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bool data)
|
|
{
|
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s32 status = 0;
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return status;
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}
|
|
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/**
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* rnpm_get_i2c_data - Reads the I2C SDA data bit
|
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* @hw: pointer to hardware structure
|
|
* @i2cctl: Current value of I2CCTL register
|
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*
|
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* Returns the I2C data bit value
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**/
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__maybe_unused static bool rnpm_get_i2c_data(u32 *i2cctl)
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|
{
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bool data = false;
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return data;
|
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}
|
|
|
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/**
|
|
* rnpm_i2c_bus_clear - Clears the I2C bus
|
|
* @hw: pointer to hardware structure
|
|
*
|
|
* Clears the I2C bus by sending nine clock pulses.
|
|
* Used when data line is stuck low.
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|
**/
|
|
__maybe_unused static void rnpm_i2c_bus_clear(struct rnpm_hw *hw)
|
|
{
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}
|
|
|
|
/**
|
|
* rnpm_tn_check_overtemp - Checks if an overtemp occurred.
|
|
* @hw: pointer to hardware structure
|
|
*
|
|
* Checks if the LASI temp alarm status was triggered due to overtemp
|
|
**/
|
|
s32 rnpm_tn_check_overtemp(struct rnpm_hw *hw)
|
|
{
|
|
s32 status = 0;
|
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|
|
return status;
|
|
}
|