48 lines
1.1 KiB
C
48 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_SW64_MSI_H
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#define _ASM_SW64_MSI_H
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#define NR_VECTORS NR_IRQS
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#define NR_IRQ_VECTORS NR_IRQS
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#define AUTO_ASSIGN 0
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#define LAST_DEVICE_VECTOR 31
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#define MSI_OFFSET 0x44
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#define NUM_MSI_IRQS 256
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#define PERCPU_MSI_IRQS 256
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#define MSIX_MSG_ADDR (0x91abc0UL)
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#ifdef CONFIG_PCI_MSI
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extern int sw64_setup_vt_msi_irqs(struct pci_dev *dev, int nvec, int type);
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extern int msi_compose_msg(unsigned int irq, struct msi_msg *msg);
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extern void sw64_irq_noop(struct irq_data *d);
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extern struct irq_chip sw64_irq_chip;
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#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
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#define MSI_ADDR_BASE_HI 0
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#define MSI_ADDR_BASE_LO 0x91abc0
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struct sw6_msi_chip_data {
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unsigned int msi_config_index;
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};
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extern void arch_init_msi_domain(struct irq_domain *domain);
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enum irq_alloc_type {
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IRQ_ALLOC_TYPE_MSI,
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IRQ_ALLOC_TYPE_MSIX,
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IRQ_ALLOC_TYPE_INTX,
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};
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struct irq_alloc_info {
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struct msi_desc *desc;
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enum irq_alloc_type type;
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struct pci_dev *msi_dev;
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irq_hw_number_t hwirq;
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};
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typedef struct irq_alloc_info msi_alloc_info_t;
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#endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */
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#endif /* CONFIG_PCI_MSI */
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#endif /* _ASM_SW64_MSI_H */
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