// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (c) 2021 Rockchip Electronics Co., Ltd. * */ &mipi_dcphy1 { status = "okay"; }; &route_dsi1 { status = "okay"; connect = <&vp3_out_dsi1>; }; &dsi1_in_vp3 { status = "okay"; }; &dsi1 { status = "okay"; dsi1_panel: panel@0 { status = "okay"; compatible = "simple-panel-dsi"; reg = <0>; backlight = <&backlight_dsi1>; power-supply = <&mipi_dsi1_power>; reset-gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>; enable-delay-ms = <35>; prepare-delay-ms = <6>; reset-delay-ms = <0>; init-delay-ms = <20>; unprepare-delay-ms = <0>; disable-delay-ms = <20>; size,width = <74>; size,height = <133>; dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; dsi,format = ; dsi,lanes = <4>; panel-init-sequence = [ 15 00 02 80 AC 15 00 02 81 B8 15 00 02 82 09 15 00 02 83 78 15 00 02 84 7F 15 00 02 85 BB 15 00 02 86 70 05 C8 01 11 05 C8 01 29 ]; panel-exit-sequence = [ 05 78 01 28 05 00 01 10 ]; disp1_timings0: display-timings { native-mode = <&dsi1_timing0>; dsi1_timing0: timing0 { clock-frequency = <51668640>; hactive = <1024>; vactive = <600>; hsync-len = <10>; hback-porch = <160>; hfront-porch = <160>; vsync-len = <1>; vback-porch = <23>; vfront-porch = <12>; hsync-active = <0>; vsync-active = <0>; de-active = <0>; pixelclk-active = <0>; }; }; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; panel_in_dsi1: endpoint { remote-endpoint = <&dsi1_out_panel>; }; }; }; }; ports { #address-cells = <1>; #size-cells = <0>; port@1 { reg = <1>; dsi1_out_panel: endpoint { remote-endpoint = <&panel_in_dsi1>; }; }; }; }; &i2c5 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&i2c5m3_xfer>; gt911_dsi1: gt911@5d { status = "okay"; compatible = "goodix,gt911"; reg = <0x5d>; interrupt-parent = <&gpio3>; interrupts = ; reset-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_LOW>; irq-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>; touchscreen-inverted-x = <1>; touchscreen-inverted-y = <1>; }; };