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openEuler:openEuler-24.03-LTS-lubancat5_v2
openEuler:openEuler-24.03-LTS
openEuler:lubancat5-rk3588
openEuler:TL3588
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pull from: openEuler:lubancat5-rk3588
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openEuler:openEuler-24.03-LTS-lubancat5_v2
openEuler:openEuler-24.03-LTS
openEuler:lubancat5-rk3588
openEuler:TL3588
openEuler:master

19 Commits
master ... lubancat5-

Author SHA1 Message Date
ardu
82c78d1546 open hdmi1,off dp1 2026-01-27 16:52:20 +08:00
ardu
60029a7ab6 repair bug 2026-01-27 16:10:40 +08:00
ardu
73a6bf4903 repair bug 2026-01-27 16:07:55 +08:00
ardu
77bfb67c43 change dts 
1 enable uart1 to uart1_m1
 2026-01-27 16:02:44 +08:00
ardu
f3571ac6b3 change rk3588s.dts 2026-01-27 15:21:54 +08:00
ardu
41ffd11f63 change rk3588s.dts 2026-01-27 15:19:33 +08:00
ardu
2ee59fd56a chang rk3588s.dts 2026-01-27 15:17:13 +08:00
ardu
f87f0f95b2 update 2026-01-27 15:12:08 +08:00
ardu
0552fe6f15 1 add jlsei PHY driver 
2 change deconfig
 2026-01-27 15:10:46 +08:00
ardu
935901dae3 change dts 2026-01-27 13:31:32 +08:00
ardu
be096f05b4 init 2026-01-27 13:28:03 +08:00
ardu
a00e038fcb add logo.bmp,logo_kernel.bmp 2026-01-24 13:48:50 +08:00
ardu
d233a56cb6 debug 2026-01-22 04:25:35 +08:00
ardu
2ca9fce2e9 debug 2026-01-22 03:25:16 +08:00
ardu
2f347a1f99 debug 2026-01-22 02:37:41 +08:00
ardu
6f501e3029 debug 2026-01-22 02:23:17 +08:00
ardu
2aee4a1d66 change dtb makefile 2026-01-22 01:15:01 +08:00
ardu
5ed66a4ae5 config kernel menuconfig 2026-01-22 00:08:52 +08:00
ardu
2a63cf8cf3 change tl3588 kernel 2026-01-21 23:15:54 +08:00
1103 changed files with 40802 additions and 275428 deletions
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31
arch/arm64/boot/dts/Makefile
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@ -1,32 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
subdir-y += actions
subdir-y += allwinner
subdir-y += altera
subdir-y += amazon
subdir-y += amd
subdir-y += amlogic
subdir-y += apm
subdir-y += arm
subdir-y += bitmain
subdir-y += broadcom
subdir-y += cavium
subdir-y += exynos
subdir-y += freescale
subdir-y += hisilicon
subdir-y += intel
subdir-y += lg
subdir-y += marvell
subdir-y += mediatek
subdir-y += microchip
subdir-y += nvidia
subdir-y += qcom
subdir-y += realtek
subdir-y += renesas
subdir-y += rockchip
subdir-y += socionext
subdir-y += sprd
subdir-y += synaptics
subdir-y += ti
subdir-y += toshiba
subdir-y += xilinx
subdir-y += zte

5
arch/arm64/boot/dts/actions/Makefile
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@ -1,5 +0,0 @@
# SPDX-License-Identifier: GPL-2.0+
dtb-$(CONFIG_ARCH_ACTIONS) += s700-cubieboard7.dtb
dtb-$(CONFIG_ARCH_ACTIONS) += s900-bubblegum-96.dtb

92
arch/arm64/boot/dts/actions/s700-cubieboard7.dts
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@ -1,92 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2017 Andreas Färber
*/
/dts-v1/;
#include "s700.dtsi"
/ {
compatible = "cubietech,cubieboard7", "actions,s700";
model = "CubieBoard7";
aliases {
serial3 = &uart3;
};
chosen {
stdout-path = "serial3:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
memory@1,e0000000 {
device_type = "memory";
reg = <0x1 0xe0000000 0x0 0x0>;
};
};
&i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_default>;
};
&i2c1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_default>;
};
&i2c2 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&i2c2_default>;
};
&pinctrl {
i2c0_default: i2c0_default {
pinmux {
groups = "i2c0_mfp";
function = "i2c0";
};
pinconf {
pins = "i2c0_sclk", "i2c0_sdata";
bias-pull-up;
};
};
i2c1_default: i2c1_default {
pinmux {
groups = "i2c1_dummy";
function = "i2c1";
};
pinconf {
pins = "i2c1_sclk", "i2c1_sdata";
bias-pull-up;
};
};
i2c2_default: i2c2_default {
pinmux {
groups = "i2c2_dummy";
function = "i2c2";
};
pinconf {
pins = "i2c2_sclk", "i2c2_sdata";
bias-pull-up;
};
};
};
&timer {
clocks = <&hosc>;
};
&uart3 {
status = "okay";
};

263
arch/arm64/boot/dts/actions/s700.dtsi
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@ -1,263 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2017 Andreas Färber
*/
#include <dt-bindings/clock/actions,s700-cmu.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/owl-s700-powergate.h>
#include <dt-bindings/reset/actions,s700-reset.h>
/ {
compatible = "actions,s700";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
cpus {
#address-cells = <2>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x0>;
enable-method = "psci";
};
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x1>;
enable-method = "psci";
};
cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x2>;
enable-method = "psci";
};
cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x3>;
enable-method = "psci";
};
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
secmon@1f000000 {
reg = <0x0 0x1f000000 0x0 0x1000000>;
no-map;
};
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
arm-pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
hosc: hosc {
compatible = "fixed-clock";
clock-frequency = <24000000>;
#clock-cells = <0>;
};
losc: losc {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
};
soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
gic: interrupt-controller@e00f1000 {
compatible = "arm,gic-400";
reg = <0x0 0xe00f1000 0x0 0x1000>,
<0x0 0xe00f2000 0x0 0x2000>,
<0x0 0xe00f4000 0x0 0x2000>,
<0x0 0xe00f6000 0x0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
interrupt-controller;
#interrupt-cells = <3>;
};
uart0: serial@e0120000 {
compatible = "actions,s900-uart", "actions,owl-uart";
reg = <0x0 0xe0120000 0x0 0x2000>;
clocks = <&cmu CLK_UART0>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
uart1: serial@e0122000 {
compatible = "actions,s900-uart", "actions,owl-uart";
reg = <0x0 0xe0122000 0x0 0x2000>;
clocks = <&cmu CLK_UART1>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
uart2: serial@e0124000 {
compatible = "actions,s900-uart", "actions,owl-uart";
reg = <0x0 0xe0124000 0x0 0x2000>;
clocks = <&cmu CLK_UART2>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
uart3: serial@e0126000 {
compatible = "actions,s900-uart", "actions,owl-uart";
reg = <0x0 0xe0126000 0x0 0x2000>;
clocks = <&cmu CLK_UART3>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
uart4: serial@e0128000 {
compatible = "actions,s900-uart", "actions,owl-uart";
reg = <0x0 0xe0128000 0x0 0x2000>;
clocks = <&cmu CLK_UART4>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
uart5: serial@e012a000 {
compatible = "actions,s900-uart", "actions,owl-uart";
reg = <0x0 0xe012a000 0x0 0x2000>;
clocks = <&cmu CLK_UART5>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
uart6: serial@e012c000 {
compatible = "actions,s900-uart", "actions,owl-uart";
reg = <0x0 0xe012c000 0x0 0x2000>;
clocks = <&cmu CLK_UART6>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
cmu: clock-controller@e0168000 {
compatible = "actions,s700-cmu";
reg = <0x0 0xe0168000 0x0 0x1000>;
clocks = <&hosc>, <&losc>;
#clock-cells = <1>;
#reset-cells = <1>;
};
i2c0: i2c@e0170000 {
compatible = "actions,s700-i2c";
reg = <0 0xe0170000 0 0x1000>;
clocks = <&cmu CLK_I2C0>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c1: i2c@e0174000 {
compatible = "actions,s700-i2c";
reg = <0 0xe0174000 0 0x1000>;
clocks = <&cmu CLK_I2C1>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c2: i2c@e0178000 {
compatible = "actions,s700-i2c";
reg = <0 0xe0178000 0 0x1000>;
clocks = <&cmu CLK_I2C2>;
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c3: i2c@e017c000 {
compatible = "actions,s700-i2c";
reg = <0 0xe017c000 0 0x1000>;
clocks = <&cmu CLK_I2C3>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
sps: power-controller@e01b0100 {
compatible = "actions,s700-sps";
reg = <0x0 0xe01b0100 0x0 0x100>;
#power-domain-cells = <1>;
};
timer: timer@e024c000 {
compatible = "actions,s700-timer";
reg = <0x0 0xe024c000 0x0 0x4000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "timer1";
};
pinctrl: pinctrl@e01b0000 {
compatible = "actions,s700-pinctrl";
reg = <0x0 0xe01b0000 0x0 0x100>;
clocks = <&cmu CLK_GPIO>;
gpio-controller;
gpio-ranges = <&pinctrl 0 0 136>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
};
dma: dma-controller@e0230000 {
compatible = "actions,s700-dma";
reg = <0x0 0xe0230000 0x0 0x1000>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
dma-channels = <10>;
dma-requests = <44>;
clocks = <&cmu CLK_DMAC>;
power-domains = <&sps S700_PD_DMA>;
};
};
};

314
arch/arm64/boot/dts/actions/s900-bubblegum-96.dts
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@ -1,314 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2017 Andreas Färber
*/
/dts-v1/;
#include "s900.dtsi"
/ {
compatible = "ucrobotics,bubblegum-96", "actions,s900";
model = "Bubblegum-96";
aliases {
mmc0 = &mmc0;
mmc1 = &mmc1;
mmc2 = &mmc2;
serial5 = &uart5;
};
chosen {
stdout-path = "serial5:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
/* Fixed regulator used in the absence of PMIC */
vcc_3v1: vcc-3v1 {
compatible = "regulator-fixed";
regulator-name = "fixed-3.1V";
regulator-min-microvolt = <3100000>;
regulator-max-microvolt = <3100000>;
regulator-always-on;
};
/* Fixed regulator used in the absence of PMIC */
sd_vcc: sd-vcc {
compatible = "regulator-fixed";
regulator-name = "fixed-3.1V";
regulator-min-microvolt = <3100000>;
regulator-max-microvolt = <3100000>;
regulator-always-on;
};
};
&i2c0 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_default>;
};
&i2c1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_default>;
};
&i2c2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c2_default>;
};
/*
* GPIO name legend: proper name = the GPIO line is used as GPIO
* NC = not connected (pin out but not routed from the chip to
* anything the board)
* "[PER]" = pin is muxed for [peripheral] (not GPIO)
* LSEC = Low Speed External Connector
* HSEC = High Speed External Connector
*
* Line names are taken from the schematic "Schematics Bubblegum96"
* version v1.0
*
* For the lines routed to the external connectors the
* lines are named after the 96Boards CE Specification 1.0,
* Appendix "Expansion Connector Signal Description".
*
* When the 96Boards naming of a line and the schematic name of
* the same line are in conflict, the 96Boards specification
* takes precedence, which means that the external UART on the
* LSEC is named UART0 while the schematic and SoC names this
* UART2. Only exception is the I2C lines for which the schematic
* naming has been preferred. This is only for the informational
* lines i.e. "[FOO]", the GPIO named lines "GPIO-A" thru "GPIO-L"
* are the only ones actually used for GPIO.
*/
&pinctrl {
gpio-line-names =
"GPIO-A", /* GPIO_0, LSEC pin 23 */
"GPIO-B", /* GPIO_1, LSEC pin 24 */
"GPIO-C", /* GPIO_2, LSEC pin 25 */
"GPIO-D", /* GPIO_3, LSEC pin 26 */
"GPIO-E", /* GPIO_4, LSEC pin 27 */
"GPIO-F", /* GPIO_5, LSEC pin 28 */
"GPIO-G", /* GPIO_6, LSEC pin 29 */
"GPIO-H", /* GPIO_7, LSEC pin 30 */
"GPIO-I", /* GPIO_8, LSEC pin 31 */
"GPIO-J", /* GPIO_9, LSEC pin 32 */
"NC", /* GPIO_10 */
"NC", /* GPIO_11 */
"SIRQ2_1V8", /* GPIO_12 */
"PCM0_OUT", /* GPIO_13 */
"WIFI_LED", /* GPIO_14 */
"PCM0_SYNC", /* GPIO_15 */
"PCM0_CLK", /* GPIO_16 */
"PCM0_IN", /* GPIO_17 */
"BT_LED", /* GPIO_18 */
"LED0", /* GPIO_19 */
"LED1", /* GPIO_20 */
"JTAG_TCK", /* GPIO_21 */
"JTAG_TMS", /* GPIO_22 */
"JTAG_TDI", /* GPIO_23 */
"JTAG_TDO", /* GPIO_24 */
"[UART1_RxD]", /* GPIO_25, LSEC pin 13 */
"NC", /* GPIO_26 */
"[UART1_TxD]", /* GPIO_27, LSEC pin 11 */
"SD0_D0", /* GPIO_28 */
"SD0_D1", /* GPIO_29 */
"SD0_D2", /* GPIO_30 */
"SD0_D3", /* GPIO_31 */
"SD1_D0", /* GPIO_32 */
"SD1_D1", /* GPIO_33 */
"SD1_D2", /* GPIO_34 */
"SD1_D3", /* GPIO_35 */
"SD0_CMD", /* GPIO_36 */
"SD0_CLK", /* GPIO_37 */
"SD1_CMD", /* GPIO_38 */
"SD1_CLK", /* GPIO_39 */
"SPI0_SCLK", /* GPIO_40, LSEC pin 8 */
"SPI0_CS", /* GPIO_41, LSEC pin 12 */
"SPI0_DIN", /* GPIO_42, LSEC pin 10 */
"SPI0_DOUT", /* GPIO_43, LSEC pin 14 */
"I2C5_SDATA", /* GPIO_44, HSEC pin 36 */
"I2C5_SCLK", /* GPIO_45, HSEC pin 38 */
"UART0_RX", /* GPIO_46, LSEC pin 7 */
"UART0_TX", /* GPIO_47, LSEC pin 5 */
"UART0_RTSB", /* GPIO_48, LSEC pin 9 */
"UART0_CTSB", /* GPIO_49, LSEC pin 3 */
"I2C4_SCLK", /* GPIO_50, HSEC pin 32 */
"I2C4_SDATA", /* GPIO_51, HSEC pin 34 */
"I2C0_SCLK", /* GPIO_52 */
"I2C0_SDATA", /* GPIO_53 */
"I2C1_SCLK", /* GPIO_54, LSEC pin 15 */
"I2C1_SDATA", /* GPIO_55, LSEC pin 17 */
"I2C2_SCLK", /* GPIO_56, LSEC pin 19 */
"I2C2_SDATA", /* GPIO_57, LSEC pin 21 */
"CSI0_DN0", /* GPIO_58, HSEC pin 10 */
"CSI0_DP0", /* GPIO_59, HSEC pin 8 */
"CSI0_DN1", /* GPIO_60, HSEC pin 16 */
"CSI0_DP1", /* GPIO_61, HSEC pin 14 */
"CSI0_CN", /* GPIO_62, HSEC pin 4 */
"CSI0_CP", /* GPIO_63, HSEC pin 2 */
"CSI0_DN2", /* GPIO_64, HSEC pin 22 */
"CSI0_DP2", /* GPIO_65, HSEC pin 20 */
"CSI0_DN3", /* GPIO_66, HSEC pin 28 */
"CSI0_DP3", /* GPIO_67, HSEC pin 26 */
"[CLK0]", /* GPIO_68, HSEC pin 15 */
"CSI1_DN0", /* GPIO_69, HSEC pin 44 */
"CSI1_DP0", /* GPIO_70, HSEC pin 42 */
"CSI1_DN1", /* GPIO_71, HSEC pin 50 */
"CSI1_DP1", /* GPIO_72, HSEC pin 48 */
"CSI1_CN", /* GPIO_73, HSEC pin 56 */
"CSI1_CP", /* GPIO_74, HSEC pin 54 */
"[CLK1]", /* GPIO_75, HSEC pin 17 */
"[GPIOD0]", /* GPIO_76 */
"[GPIOD1]", /* GPIO_77 */
"BT_RST_N", /* GPIO_78 */
"EXT_DC_EN", /* GPIO_79 */
"[PCM_DI]", /* GPIO_80, LSEC pin 22 */
"[PCM_DO]", /* GPIO_81, LSEC pin 20 */
"[PCM_CLK]", /* GPIO_82, LSEC pin 18 */
"[PCM_FS]", /* GPIO_83, LSEC pin 16 */
"WAKE_BT", /* GPIO_84 */
"WL_REG_ON", /* GPIO_85 */
"NC", /* GPIO_86 */
"NC", /* GPIO_87 */
"NC", /* GPIO_88 */
"NC", /* GPIO_89 */
"NC", /* GPIO_90 */
"WIFI_WAKE", /* GPIO_91 */
"BT_WAKE", /* GPIO_92 */
"NC", /* GPIO_93 */
"OTG_EN2", /* GPIO_94 */
"OTG_EN", /* GPIO_95 */
"DSI_DP3", /* GPIO_96, HSEC pin 45 */
"DSI_DN3", /* GPIO_97, HSEC pin 47 */
"DSI_DP1", /* GPIO_98, HSEC pin 33 */
"DSI_DN1", /* GPIO_99, HSEC pin 35 */
"DSI_CP", /* GPIO_100, HSEC pin 21 */
"DSI_CN", /* GPIO_101, HSEC pin 23 */
"DSI_DP0", /* GPIO_102, HSEC pin 27 */
"DSI_DN0", /* GPIO_103, HSEC pin 29 */
"DSI_DP2", /* GPIO_104, HSEC pin 39 */
"DSI_DN2", /* GPIO_105, HSEC pin 41 */
"N0_D0", /* GPIO_106 */
"N0_D1", /* GPIO_107 */
"N0_D2", /* GPIO_108 */
"N0_D3", /* GPIO_109 */
"N0_D4", /* GPIO_110 */
"N0_D5", /* GPIO_111 */
"N0_D6", /* GPIO_112 */
"N0_D7", /* GPIO_113 */
"N0_DQS", /* GPIO_114 */
"N0_DQSN", /* GPIO_115 */
"NC", /* GPIO_116 */
"NC", /* GPIO_117 */
"NC", /* GPIO_118 */
"N0_CEB1", /* GPIO_119 */
"CARD_DT", /* GPIO_120 */
"N0_CEB3", /* GPIO_121 */
"SD_DAT0", /* GPIO_122, HSEC pin 1 */
"SD_DAT1", /* GPIO_123, HSEC pin 3 */
"SD_DAT2", /* GPIO_124, HSEC pin 5 */
"SD_DAT3", /* GPIO_125, HSEC pin 7 */
"NC", /* GPIO_126 */
"NC", /* GPIO_127 */
"[PWR_BTN_N]", /* GPIO_128, LSEC pin 4 */
"[RST_BTN_N]", /* GPIO_129, LSEC pin 6 */
"NC", /* GPIO_130 */
"SD_CMD", /* GPIO_131 */
"GPIO-L", /* GPIO_132, LSEC pin 34 */
"GPIO-K", /* GPIO_133, LSEC pin 33 */
"NC", /* GPIO_134 */
"SD_SCLK", /* GPIO_135 */
"NC", /* GPIO_136 */
"JTAG_TRST", /* GPIO_137 */
"I2C3_SCLK", /* GPIO_138 */
"LED2", /* GPIO_139 */
"LED3", /* GPIO_140 */
"I2C3_SDATA", /* GPIO_141 */
"UART3_RX", /* GPIO_142 */
"UART3_TX", /* GPIO_143 */
"UART3_RTSB", /* GPIO_144 */
"UART3_CTSB"; /* GPIO_145 */
i2c0_default: i2c0-default {
pinmux {
groups = "i2c0_mfp";
function = "i2c0";
};
pinconf {
pins = "i2c0_sclk", "i2c0_sdata";
bias-pull-up;
};
};
i2c1_default: i2c1-default {
pinconf {
pins = "i2c1_sclk", "i2c1_sdata";
bias-pull-up;
};
};
i2c2_default: i2c2-default {
pinconf {
pins = "i2c2_sclk", "i2c2_sdata";
bias-pull-up;
};
};
mmc0_default: mmc0_default {
pinmux {
groups = "sd0_d0_mfp", "sd0_d1_mfp", "sd0_d2_d3_mfp",
"sd0_cmd_mfp", "sd0_clk_mfp";
function = "sd0";
};
};
mmc2_default: mmc2_default {
pinmux {
groups = "nand0_d0_ceb3_mfp";
function = "sd2";
};
};
};
/* uSD */
&mmc0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mmc0_default>;
no-sdio;
no-mmc;
no-1-8-v;
cd-gpios = <&pinctrl 120 GPIO_ACTIVE_LOW>;
bus-width = <4>;
vmmc-supply = <&sd_vcc>;
vqmmc-supply = <&sd_vcc>;
};
/* eMMC */
&mmc2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mmc2_default>;
no-sdio;
no-sd;
non-removable;
bus-width = <8>;
vmmc-supply = <&vcc_3v1>;
};
&timer {
clocks = <&hosc>;
};
&uart5 {
status = "okay";
};

333
arch/arm64/boot/dts/actions/s900.dtsi
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@ -1,333 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2017 Andreas Färber
*/
#include <dt-bindings/clock/actions,s900-cmu.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/actions,s900-reset.h>
/ {
compatible = "actions,s900";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
cpus {
#address-cells = <2>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x0>;
enable-method = "psci";
};
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x1>;
enable-method = "psci";
};
cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x2>;
enable-method = "psci";
};
cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x3>;
enable-method = "psci";
};
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
secmon@1f000000 {
reg = <0x0 0x1f000000 0x0 0x1000000>;
no-map;
};
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
arm-pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
hosc: hosc {
compatible = "fixed-clock";
clock-frequency = <24000000>;
#clock-cells = <0>;
};
losc: losc {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
};
diff24M: diff24M {
compatible = "fixed-clock";
clock-frequency = <24000000>;
#clock-cells = <0>;
};
soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
gic: interrupt-controller@e00f1000 {
compatible = "arm,gic-400";
reg = <0x0 0xe00f1000 0x0 0x1000>,
<0x0 0xe00f2000 0x0 0x2000>,
<0x0 0xe00f4000 0x0 0x2000>,
<0x0 0xe00f6000 0x0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
interrupt-controller;
#interrupt-cells = <3>;
};
uart0: serial@e0120000 {
compatible = "actions,s900-uart", "actions,owl-uart";
reg = <0x0 0xe0120000 0x0 0x2000>;
clocks = <&cmu CLK_UART0>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
uart1: serial@e0122000 {
compatible = "actions,s900-uart", "actions,owl-uart";
reg = <0x0 0xe0122000 0x0 0x2000>;
clocks = <&cmu CLK_UART1>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
uart2: serial@e0124000 {
compatible = "actions,s900-uart", "actions,owl-uart";
reg = <0x0 0xe0124000 0x0 0x2000>;
clocks = <&cmu CLK_UART2>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
uart3: serial@e0126000 {
compatible = "actions,s900-uart", "actions,owl-uart";
reg = <0x0 0xe0126000 0x0 0x2000>;
clocks = <&cmu CLK_UART3>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
uart4: serial@e0128000 {
compatible = "actions,s900-uart", "actions,owl-uart";
reg = <0x0 0xe0128000 0x0 0x2000>;
clocks = <&cmu CLK_UART4>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
uart5: serial@e012a000 {
compatible = "actions,s900-uart", "actions,owl-uart";
reg = <0x0 0xe012a000 0x0 0x2000>;
clocks = <&cmu CLK_UART5>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
uart6: serial@e012c000 {
compatible = "actions,s900-uart", "actions,owl-uart";
reg = <0x0 0xe012c000 0x0 0x2000>;
clocks = <&cmu CLK_UART6>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
sps: power-controller@e012e000 {
compatible = "actions,s900-sps";
reg = <0x0 0xe012e000 0x0 0x2000>;
#power-domain-cells = <1>;
};
cmu: clock-controller@e0160000 {
compatible = "actions,s900-cmu";
reg = <0x0 0xe0160000 0x0 0x1000>;
clocks = <&hosc>, <&losc>;
#clock-cells = <1>;
#reset-cells = <1>;
};
i2c0: i2c@e0170000 {
compatible = "actions,s900-i2c";
reg = <0 0xe0170000 0 0x1000>;
clocks = <&cmu CLK_I2C0>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c1: i2c@e0172000 {
compatible = "actions,s900-i2c";
reg = <0 0xe0172000 0 0x1000>;
clocks = <&cmu CLK_I2C1>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c2: i2c@e0174000 {
compatible = "actions,s900-i2c";
reg = <0 0xe0174000 0 0x1000>;
clocks = <&cmu CLK_I2C2>;
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c3: i2c@e0176000 {
compatible = "actions,s900-i2c";
reg = <0 0xe0176000 0 0x1000>;
clocks = <&cmu CLK_I2C3>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c4: i2c@e0178000 {
compatible = "actions,s900-i2c";
reg = <0 0xe0178000 0 0x1000>;
clocks = <&cmu CLK_I2C4>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c5: i2c@e017a000 {
compatible = "actions,s900-i2c";
reg = <0 0xe017a000 0 0x1000>;
clocks = <&cmu CLK_I2C5>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
pinctrl: pinctrl@e01b0000 {
compatible = "actions,s900-pinctrl";
reg = <0x0 0xe01b0000 0x0 0x1000>;
clocks = <&cmu CLK_GPIO>;
gpio-controller;
gpio-ranges = <&pinctrl 0 0 146>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
};
timer: timer@e0228000 {
compatible = "actions,s900-timer";
reg = <0x0 0xe0228000 0x0 0x8000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "timer1";
};
dma: dma-controller@e0260000 {
compatible = "actions,s900-dma";
reg = <0x0 0xe0260000 0x0 0x1000>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
dma-channels = <12>;
dma-requests = <46>;
clocks = <&cmu CLK_DMAC>;
};
mmc0: mmc@e0330000 {
compatible = "actions,owl-mmc";
reg = <0x0 0xe0330000 0x0 0x4000>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu CLK_SD0>;
resets = <&cmu RESET_SD0>;
dmas = <&dma 2>;
dma-names = "mmc";
status = "disabled";
};
mmc1: mmc@e0334000 {
compatible = "actions,owl-mmc";
reg = <0x0 0xe0334000 0x0 0x4000>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu CLK_SD1>;
resets = <&cmu RESET_SD1>;
dmas = <&dma 3>;
dma-names = "mmc";
status = "disabled";
};
mmc2: mmc@e0338000 {
compatible = "actions,owl-mmc";
reg = <0x0 0xe0338000 0x0 0x4000>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu CLK_SD2>;
resets = <&cmu RESET_SD2>;
dmas = <&dma 4>;
dma-names = "mmc";
status = "disabled";
};
mmc3: mmc@e033c000 {
compatible = "actions,owl-mmc";
reg = <0x0 0xe033c000 0x0 0x4000>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu CLK_SD3>;
resets = <&cmu RESET_SD3>;
dmas = <&dma 46>;
dma-names = "mmc";
status = "disabled";
};
};
};

37
arch/arm64/boot/dts/allwinner/Makefile
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@ -1,37 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-amarula-relic.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-bananapi-m64.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-nanopi-a64.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-oceanic-5205-5inmfd.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-emmc.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-lts.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinebook.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinephone-1.0.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinephone-1.1.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinephone-1.2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinetab.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a100-allwinner-perf1.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-bananapi-m2-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-bananapi-m2-plus-v1.2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-emlid-neutis-n5-devboard.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h3-cc.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h3-it.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h5-cc.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-beelink-gs1.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-3.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-lite2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-one-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64-model-b.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6.dtb

155
arch/arm64/boot/dts/allwinner/axp803.dtsi
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@ -1,155 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright 2017 Icenowy Zheng <icenowy@aosc.xyz>
/*
* AXP803 Integrated Power Management Chip
* http://files.pine64.org/doc/datasheet/pine64/AXP803_Datasheet_V1.0.pdf
*/
&axp803 {
interrupt-controller;
#interrupt-cells = <1>;
ac_power_supply: ac-power-supply {
compatible = "x-powers,axp803-ac-power-supply",
"x-powers,axp813-ac-power-supply";
status = "disabled";
};
axp_adc: adc {
compatible = "x-powers,axp803-adc", "x-powers,axp813-adc";
#io-channel-cells = <1>;
};
axp_gpio: gpio {
compatible = "x-powers,axp803-gpio", "x-powers,axp813-gpio";
gpio-controller;
#gpio-cells = <2>;
gpio0_ldo: gpio0-ldo {
pins = "GPIO0";
function = "ldo";
};
gpio1_ldo: gpio1-ldo {
pins = "GPIO1";
function = "ldo";
};
};
battery_power_supply: battery-power-supply {
compatible = "x-powers,axp803-battery-power-supply",
"x-powers,axp813-battery-power-supply";
status = "disabled";
};
regulators {
/* Default work frequency for buck regulators */
x-powers,dcdc-freq = <3000>;
reg_aldo1: aldo1 {
regulator-name = "aldo1";
};
reg_aldo2: aldo2 {
regulator-name = "aldo2";
};
reg_aldo3: aldo3 {
regulator-name = "aldo3";
};
reg_dc1sw: dc1sw {
regulator-name = "dc1sw";
};
reg_dcdc1: dcdc1 {
regulator-name = "dcdc1";
};
reg_dcdc2: dcdc2 {
regulator-name = "dcdc2";
};
reg_dcdc3: dcdc3 {
regulator-name = "dcdc3";
};
reg_dcdc4: dcdc4 {
regulator-name = "dcdc4";
};
reg_dcdc5: dcdc5 {
regulator-name = "dcdc5";
};
reg_dcdc6: dcdc6 {
regulator-name = "dcdc6";
};
reg_dldo1: dldo1 {
regulator-name = "dldo1";
};
reg_dldo2: dldo2 {
regulator-name = "dldo2";
};
reg_dldo3: dldo3 {
regulator-name = "dldo3";
};
reg_dldo4: dldo4 {
regulator-name = "dldo4";
};
reg_eldo1: eldo1 {
regulator-name = "eldo1";
};
reg_eldo2: eldo2 {
regulator-name = "eldo2";
};
reg_eldo3: eldo3 {
regulator-name = "eldo3";
};
reg_fldo1: fldo1 {
regulator-name = "fldo1";
};
reg_fldo2: fldo2 {
regulator-name = "fldo2";
};
reg_ldo_io0: ldo-io0 {
regulator-name = "ldo-io0";
status = "disabled";
};
reg_ldo_io1: ldo-io1 {
regulator-name = "ldo-io1";
status = "disabled";
};
reg_rtc_ldo: rtc-ldo {
/* RTC_LDO is a fixed, always-on regulator */
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "rtc-ldo";
};
reg_drivevbus: drivevbus {
regulator-name = "drivevbus";
status = "disabled";
};
};
usb_power_supply: usb-power-supply {
compatible = "x-powers,axp803-usb-power-supply",
"x-powers,axp813-usb-power-supply";
status = "disabled";
};
};

180
arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts
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@ -1,180 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
/*
* Copyright (c) 2020 Yangtao Li <frank@allwinnertech.com>
*/
/dts-v1/;
#include "sun50i-a100.dtsi"
/{
model = "Allwinner A100 Perf1";
compatible = "allwinner,a100-perf1", "allwinner,sun50i-a100";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&pio {
vcc-pb-supply = <&reg_dcdc1>;
vcc-pc-supply = <&reg_eldo1>;
vcc-pd-supply = <&reg_dcdc1>;
vcc-pe-supply = <&reg_dldo2>;
vcc-pf-supply = <&reg_dcdc1>;
vcc-pg-supply = <&reg_dldo1>;
vcc-ph-supply = <&reg_dcdc1>;
};
&r_pio {
/*
* FIXME: We can't add that supply for now since it would
* create a circular dependency between pinctrl, the regulator
* and the RSB Bus.
*
* vcc-pl-supply = <&reg_aldo3>;
*/
};
&r_i2c0 {
status = "okay";
axp803: pmic@34 {
compatible = "x-powers,axp803";
reg = <0x34>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */
};
};
#include "axp803.dtsi"
&ac_power_supply {
status = "okay";
};
&reg_aldo1 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-pll-avcc";
};
&reg_aldo2 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-dram-1";
};
&reg_aldo3 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-usb-pl";
};
&reg_dcdc1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-io-usb-pd-emmc-nand-card";
};
&reg_dcdc2 {
regulator-always-on;
/*
* FIXME: update min and max before support dvfs.
*/
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1300000>;
regulator-name = "vdd-cpux";
};
/* DCDC3 is polyphased with DCDC2 */
&reg_dcdc4 {
regulator-always-on;
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <950000>;
regulator-name = "vdd-sys-usb-dram";
};
&reg_dcdc5 {
regulator-always-on;
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-name = "vcc-dram-2";
};
&reg_dldo1 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-pg-dcxo-wifi";
};
&reg_dldo2 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "vcc-pe-csi";
};
&reg_dldo3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "ldo-avdd-csi";
};
&reg_dldo4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "avcc-csi";
};
&reg_eldo1 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-pc-lvds-csi-efuse-emmc-nand";
};
&reg_eldo2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1800000>;
regulator-name = "dvdd-csi";
};
&reg_eldo3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-mipi-lcd";
};
&reg_fldo1 {
regulator-always-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-name = "vdd-cpus-usb";
};
&reg_ldo_io0 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-ctp";
status = "okay";
};
&reg_drivevbus {
regulator-name = "usb0-vbus";
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};

364
arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
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@ -1,364 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
/*
* Copyright (c) 2020 Yangtao Li <frank@allwinnertech.com>
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/sun50i-a100-ccu.h>
#include <dt-bindings/clock/sun50i-a100-r-ccu.h>
#include <dt-bindings/reset/sun50i-a100-ccu.h>
#include <dt-bindings/reset/sun50i-a100-r-ccu.h>
/ {
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <0x0>;
enable-method = "psci";
};
cpu@1 {
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <0x1>;
enable-method = "psci";
};
cpu@2 {
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <0x2>;
enable-method = "psci";
};
cpu@3 {
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <0x3>;
enable-method = "psci";
};
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
dcxo24M: dcxo24M-clk {
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "dcxo24M";
#clock-cells = <0>;
};
iosc: internal-osc-clk {
compatible = "fixed-clock";
clock-frequency = <16000000>;
clock-accuracy = <300000000>;
clock-output-names = "iosc";
#clock-cells = <0>;
};
osc32k: osc32k-clk {
compatible = "fixed-clock";
clock-frequency = <32768>;
clock-output-names = "osc32k";
#clock-cells = <0>;
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
<GIC_PPI 14
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
<GIC_PPI 11
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
<GIC_PPI 10
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0 0x3fffffff>;
ccu: clock@3001000 {
compatible = "allwinner,sun50i-a100-ccu";
reg = <0x03001000 0x1000>;
clocks = <&dcxo24M>, <&osc32k>, <&iosc>;
clock-names = "hosc", "losc", "iosc";
#clock-cells = <1>;
#reset-cells = <1>;
};
gic: interrupt-controller@3021000 {
compatible = "arm,gic-400";
reg = <0x03021000 0x1000>, <0x03022000 0x2000>,
<0x03024000 0x2000>, <0x03026000 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_HIGH)>;
interrupt-controller;
#interrupt-cells = <3>;
};
efuse@3006000 {
compatible = "allwinner,sun50i-a100-sid",
"allwinner,sun50i-a64-sid";
reg = <0x03006000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ths_calibration: calib@14 {
reg = <0x14 8>;
};
};
pio: pinctrl@300b000 {
compatible = "allwinner,sun50i-a100-pinctrl";
reg = <0x0300b000 0x400>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_APB1>, <&dcxo24M>, <&osc32k>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <3>;
interrupt-controller;
#interrupt-cells = <3>;
uart0_pb_pins: uart0-pb-pins {
pins = "PB9", "PB10";
function = "uart0";
};
};
uart0: serial@5000000 {
compatible = "snps,dw-apb-uart";
reg = <0x05000000 0x400>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART0>;
resets = <&ccu RST_BUS_UART0>;
status = "disabled";
};
uart1: serial@5000400 {
compatible = "snps,dw-apb-uart";
reg = <0x05000400 0x400>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART1>;
resets = <&ccu RST_BUS_UART1>;
status = "disabled";
};
uart2: serial@5000800 {
compatible = "snps,dw-apb-uart";
reg = <0x05000800 0x400>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART2>;
resets = <&ccu RST_BUS_UART2>;
status = "disabled";
};
uart3: serial@5000c00 {
compatible = "snps,dw-apb-uart";
reg = <0x05000c00 0x400>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART3>;
resets = <&ccu RST_BUS_UART3>;
status = "disabled";
};
uart4: serial@5001000 {
compatible = "snps,dw-apb-uart";
reg = <0x05001000 0x400>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART4>;
resets = <&ccu RST_BUS_UART4>;
status = "disabled";
};
i2c0: i2c@5002000 {
compatible = "allwinner,sun50i-a100-i2c",
"allwinner,sun6i-a31-i2c";
reg = <0x05002000 0x400>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_I2C0>;
resets = <&ccu RST_BUS_I2C0>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
i2c1: i2c@5002400 {
compatible = "allwinner,sun50i-a100-i2c",
"allwinner,sun6i-a31-i2c";
reg = <0x05002400 0x400>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_I2C1>;
resets = <&ccu RST_BUS_I2C1>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
i2c2: i2c@5002800 {
compatible = "allwinner,sun50i-a100-i2c",
"allwinner,sun6i-a31-i2c";
reg = <0x05002800 0x400>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_I2C2>;
resets = <&ccu RST_BUS_I2C2>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
i2c3: i2c@5002c00 {
compatible = "allwinner,sun50i-a100-i2c",
"allwinner,sun6i-a31-i2c";
reg = <0x05002c00 0x400>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_I2C3>;
resets = <&ccu RST_BUS_I2C3>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
ths: thermal-sensor@5070400 {
compatible = "allwinner,sun50i-a100-ths";
reg = <0x05070400 0x100>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_THS>;
clock-names = "bus";
resets = <&ccu RST_BUS_THS>;
nvmem-cells = <&ths_calibration>;
nvmem-cell-names = "calibration";
#thermal-sensor-cells = <1>;
};
r_ccu: clock@7010000 {
compatible = "allwinner,sun50i-a100-r-ccu";
reg = <0x07010000 0x300>;
clocks = <&dcxo24M>, <&osc32k>, <&iosc>,
<&ccu CLK_PLL_PERIPH0>;
clock-names = "hosc", "losc", "iosc", "pll-periph";
#clock-cells = <1>;
#reset-cells = <1>;
};
r_intc: interrupt-controller@7010320 {
compatible = "allwinner,sun50i-a100-nmi",
"allwinner,sun9i-a80-nmi";
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x07010320 0xc>;
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
};
r_pio: pinctrl@7022000 {
compatible = "allwinner,sun50i-a100-r-pinctrl";
reg = <0x07022000 0x400>;
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&r_ccu CLK_R_APB1>, <&dcxo24M>, <&osc32k>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <3>;
interrupt-controller;
#interrupt-cells = <3>;
r_i2c0_pins: r-i2c0-pins {
pins = "PL0", "PL1";
function = "s_i2c0";
};
r_i2c1_pins: r-i2c1-pins {
pins = "PL8", "PL9";
function = "s_i2c1";
};
};
r_uart: serial@7080000 {
compatible = "snps,dw-apb-uart";
reg = <0x07080000 0x400>;
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&r_ccu CLK_R_APB2_UART>;
resets = <&r_ccu RST_R_APB2_UART>;
status = "disabled";
};
r_i2c0: i2c@7081400 {
compatible = "allwinner,sun50i-a100-i2c",
"allwinner,sun6i-a31-i2c";
reg = <0x07081400 0x400>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&r_ccu CLK_R_APB2_I2C0>;
resets = <&r_ccu RST_R_APB2_I2C0>;
pinctrl-names = "default";
pinctrl-0 = <&r_i2c0_pins>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
r_i2c1: i2c@7081800 {
compatible = "allwinner,sun50i-a100-i2c",
"allwinner,sun6i-a31-i2c";
reg = <0x07081800 0x400>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&r_ccu CLK_R_APB2_I2C1>;
resets = <&r_ccu RST_R_APB2_I2C1>;
pinctrl-names = "default";
pinctrl-0 = <&r_i2c1_pins>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
};
thermal-zones {
cpu-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 0>;
};
ddr-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 2>;
};
gpu-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 1>;
};
};
};

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arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2018 Amarula Solutions B.V.
// Author: Jagan Teki <jagan@amarulasolutions.com>
/dts-v1/;
#include "sun50i-a64.dtsi"
#include "sun50i-a64-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Amarula A64-Relic";
compatible = "amarula,a64-relic", "allwinner,sun50i-a64";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
i2c {
compatible = "i2c-gpio";
sda-gpios = <&pio 4 13 GPIO_ACTIVE_HIGH>;
scl-gpios = <&pio 4 12 GPIO_ACTIVE_HIGH>;
i2c-gpio,delay-us = <5>;
#address-cells = <1>;
#size-cells = <0>;
ov5640: camera@3c {
compatible = "ovti,ov5640";
reg = <0x3c>;
pinctrl-names = "default";
pinctrl-0 = <&csi_mclk_pin>;
clocks = <&ccu CLK_CSI_MCLK>;
clock-names = "xclk";
AVDD-supply = <&reg_aldo1>;
DOVDD-supply = <&reg_dldo3>;
DVDD-supply = <&reg_eldo3>;
reset-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>; /* CSI-RST-R: PE14 */
powerdown-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* CSI-STBY-R: PE15 */
port {
ov5640_ep: endpoint {
remote-endpoint = <&csi_ep>;
bus-width = <8>;
hsync-active = <1>; /* Active high */
vsync-active = <0>; /* Active low */
data-active = <1>; /* Active high */
pclk-sample = <1>; /* Rising */
};
};
};
};
wifi_pwrseq: wifi-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rtc 1>;
clock-names = "ext_clock";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* WL-PMU-EN: PL2 */
};
};
&cpu0 {
cpu-supply = <&reg_dcdc2>;
};
&cpu1 {
cpu-supply = <&reg_dcdc2>;
};
&cpu2 {
cpu-supply = <&reg_dcdc2>;
};
&cpu3 {
cpu-supply = <&reg_dcdc2>;
};
&csi {
status = "okay";
port {
csi_ep: endpoint {
remote-endpoint = <&ov5640_ep>;
bus-width = <8>;
hsync-active = <1>; /* Active high */
vsync-active = <0>; /* Active low */
data-active = <1>; /* Active high */
pclk-sample = <1>; /* Rising */
};
};
};
&ehci0 {
status = "okay";
};
&i2c0 {
status = "okay";
sensor@48 {
compatible = "st,stlm75";
reg = <0x48>;
};
};
&i2c0_pins {
bias-pull-up;
};
&i2c1 {
status = "okay";
touchscreen@5d {
compatible = "goodix,gt5663";
reg = <0x5d>;
AVDD28-supply = <&reg_ldo_io0>; /* VCC-CTP: GPIO0-LDO */
interrupt-parent = <&pio>;
interrupts = <7 4 IRQ_TYPE_EDGE_FALLING>;
irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* CTP-INT: PH4 */
reset-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* CTP-RST: PH8 */
touchscreen-inverted-x;
touchscreen-inverted-y;
};
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
vmmc-supply = <&reg_dcdc1>;
/*
* Schematic shows both dldo4 and eldo1 connected for vcc-io-wifi, but
* dldo4 connection shows DNP(Do Not Populate) and eldo1 connected with
* 0Ohm register to vcc-io-wifi so eldo1 is used.
*/
vqmmc-supply = <&reg_eldo1>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&r_pio>;
interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* WL-WAKE-AP: PL3 */
interrupt-names = "host-wake";
};
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
vmmc-supply = <&reg_dcdc1>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
status = "okay";
};
&ohci0 {
status = "okay";
};
&r_rsb {
status = "okay";
axp803: pmic@3a3 {
compatible = "x-powers,axp803";
reg = <0x3a3>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */
};
};
#include "axp803.dtsi"
&reg_aldo1 {
regulator-always-on;
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "avdd-csi";
};
&reg_aldo2 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-pl";
};
&reg_aldo3 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vcc-pll-avcc";
};
&reg_dcdc1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-3v3";
};
&reg_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1040000>;
regulator-max-microvolt = <1300000>;
regulator-name = "vdd-cpux";
};
/* DCDC3 is polyphased with DCDC2 */
&reg_dcdc5 {
regulator-always-on;
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-name = "vcc-dram";
};
&reg_dcdc6 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-sys";
};
&reg_dldo1 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-hdmi-dsi-sensor";
};
&reg_dldo2 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-mipi";
};
&reg_dldo3 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "dovdd-csi";
};
&reg_dldo4 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi-io";
};
&reg_drivevbus {
regulator-name = "usb0-vbus";
status = "okay";
};
&reg_eldo1 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "cpvdd";
};
&reg_eldo3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "dvdd-csi";
};
&reg_fldo1 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vcc-1v2-hsic";
};
/*
* The A64 chip cannot work without this regulator off, although
* it seems to be only driving the AR100 core.
* Maybe we don't still know well about CPUs domain.
*/
&reg_fldo2 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpus";
};
&reg_ldo_io0 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "vcc-ctp";
status = "okay";
};
&reg_rtc_ldo {
regulator-name = "vcc-rtc";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
&usb_otg {
dr_mode = "otg";
status = "okay";
};
&usbphy {
usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
usb0_vbus-supply = <&reg_drivevbus>;
status = "okay";
};

382
arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (c) 2016 ARM Ltd.
/dts-v1/;
#include "sun50i-a64.dtsi"
#include "sun50i-a64-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "BananaPi-M64";
compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
aliases {
ethernet0 = &emac;
serial0 = &uart0;
serial1 = &uart1;
};
chosen {
stdout-path = "serial0:115200n8";
};
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
leds {
compatible = "gpio-leds";
pwr-led {
label = "bananapi-m64:red:pwr";
gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
default-state = "on";
};
green {
label = "bananapi-m64:green:user";
gpios = <&pio 4 14 GPIO_ACTIVE_HIGH>; /* PE14 */
};
blue {
label = "bananapi-m64:blue:user";
gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 */
};
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
clocks = <&rtc 1>;
clock-names = "ext_clock";
};
};
&codec {
status = "okay";
};
&codec_analog {
cpvdd-supply = <&reg_eldo1>;
status = "okay";
};
&cpu0 {
cpu-supply = <&reg_dcdc2>;
};
&cpu1 {
cpu-supply = <&reg_dcdc2>;
};
&cpu2 {
cpu-supply = <&reg_dcdc2>;
};
&cpu3 {
cpu-supply = <&reg_dcdc2>;
};
&dai {
status = "okay";
};
&de {
status = "okay";
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
phy-mode = "rgmii-id";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <&reg_dc1sw>;
status = "okay";
};
&hdmi {
hvcc-supply = <&reg_dldo1>;
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&i2c1 {
status = "okay";
};
&i2c1_pins {
bias-pull-up;
};
&mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
vmmc-supply = <&reg_dcdc1>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
disable-wp;
bus-width = <4>;
status = "okay";
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
vmmc-supply = <&reg_dldo2>;
vqmmc-supply = <&reg_dldo4>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&r_pio>;
interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */
interrupt-names = "host-wake";
};
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>, <&mmc2_ds_pin>;
vmmc-supply = <&reg_dcdc1>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
status = "okay";
};
&ohci0 {
status = "okay";
};
&ohci1 {
status = "okay";
};
&r_rsb {
status = "okay";
axp803: pmic@3a3 {
compatible = "x-powers,axp803";
reg = <0x3a3>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */
};
};
#include "axp803.dtsi"
&ac_power_supply {
status = "okay";
};
&battery_power_supply {
status = "okay";
};
&reg_aldo1 {
/*
* This regulator also drives the PE pingroup GPIOs,
* which also controls two LEDs.
*/
regulator-always-on;
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "afvcc-csi";
};
&reg_aldo2 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-pl";
};
&reg_aldo3 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vcc-pll-avcc";
};
&reg_dc1sw {
/*
* This regulator also indirectly drives the PD pingroup GPIOs,
* which also controls the power LED.
*/
regulator-always-on;
regulator-name = "vcc-phy";
};
&reg_dcdc1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-3v3";
};
&reg_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1040000>;
regulator-max-microvolt = <1300000>;
regulator-name = "vdd-cpux";
};
/* DCDC3 is polyphased with DCDC2 */
&reg_dcdc5 {
regulator-always-on;
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-name = "vcc-dram";
};
&reg_dcdc6 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-sys";
};
&reg_dldo1 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-hdmi-dsi";
};
&reg_dldo2 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi";
};
&reg_dldo4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi-io";
};
&reg_drivevbus {
regulator-name = "usb0-vbus";
status = "okay";
};
&reg_eldo1 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "cpvdd";
};
&reg_fldo1 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vcc-1v2-hsic";
};
/*
* The A64 chip cannot work without this regulator off, although
* it seems to be only driving the AR100 core.
* Maybe we don't still know well about CPUs domain.
*/
&reg_fldo2 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpus";
};
&reg_rtc_ldo {
regulator-name = "vcc-rtc";
};
&simplefb_hdmi {
vcc-hdmi-supply = <&reg_dldo1>;
};
&sound {
status = "okay";
simple-audio-card,widgets = "Headphone", "Headphone Jack",
"Microphone", "Microphone Jack",
"Microphone", "Onboard Microphone";
simple-audio-card,routing =
"Left DAC", "DACL",
"Right DAC", "DACR",
"ADCL", "Left ADC",
"ADCR", "Right ADC",
"Headphone Jack", "HP",
"MIC2", "Microphone Jack",
"Onboard Microphone", "MBIAS",
"MIC1", "Onboard Microphone";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
uart-has-rtscts;
status = "okay";
bluetooth {
compatible = "brcm,bcm43438-bt";
clocks = <&rtc 1>;
clock-names = "lpo";
vbat-supply = <&reg_dldo2>;
vddio-supply = <&reg_dldo4>;
device-wakeup-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
host-wakeup-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
shutdown-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
};
};
&usb_otg {
dr_mode = "otg";
status = "okay";
};
&usb_power_supply {
status = "okay";
};
&usbphy {
usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
usb0_vbus_power-supply = <&usb_power_supply>;
usb0_vbus-supply = <&reg_drivevbus>;
status = "okay";
};

75
arch/arm64/boot/dts/allwinner/sun50i-a64-cpu-opp.dtsi
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@ -1,75 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2020 Vasily khoruzhick <anarsoul@gmail.com>
*/
/ {
cpu0_opp_table: opp-table-cpu {
compatible = "operating-points-v2";
opp-shared;
opp-648000000 {
opp-hz = /bits/ 64 <648000000>;
opp-microvolt = <1040000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp-816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <1100000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp-912000000 {
opp-hz = /bits/ 64 <912000000>;
opp-microvolt = <1120000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp-960000000 {
opp-hz = /bits/ 64 <960000000>;
opp-microvolt = <1160000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp-1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <1200000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp-1056000000 {
opp-hz = /bits/ 64 <1056000000>;
opp-microvolt = <1240000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp-1104000000 {
opp-hz = /bits/ 64 <1104000000>;
opp-microvolt = <1260000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp-1152000000 {
opp-hz = /bits/ 64 <1152000000>;
opp-microvolt = <1300000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
};
};
&cpu0 {
operating-points-v2 = <&cpu0_opp_table>;
};
&cpu1 {
operating-points-v2 = <&cpu0_opp_table>;
};
&cpu2 {
operating-points-v2 = <&cpu0_opp_table>;
};
&cpu3 {
operating-points-v2 = <&cpu0_opp_table>;
};

263
arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
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@ -1,263 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
/dts-v1/;
#include "sun50i-a64.dtsi"
#include "sun50i-a64-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "FriendlyARM NanoPi A64";
compatible = "friendlyarm,nanopi-a64", "allwinner,sun50i-a64";
aliases {
ethernet0 = &emac;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
leds {
compatible = "gpio-leds";
blue {
label = "nanopi-a64:blue:status";
gpios = <&pio 3 24 GPIO_ACTIVE_LOW>; /* PD24 */
};
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rtc 1>;
clock-names = "ext_clock";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
};
};
&cpu0 {
cpu-supply = <&reg_dcdc2>;
};
&cpu1 {
cpu-supply = <&reg_dcdc2>;
};
&cpu2 {
cpu-supply = <&reg_dcdc2>;
};
&cpu3 {
cpu-supply = <&reg_dcdc2>;
};
&de {
status = "okay";
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
phy-mode = "rgmii";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <&reg_dcdc1>;
status = "okay";
};
&hdmi {
hvcc-supply = <&reg_dldo1>;
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
/* i2c1 connected with gpio headers like pine64, bananapi */
&i2c1_pins {
bias-pull-up;
};
&mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <7>;
};
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
vmmc-supply = <&reg_dcdc1>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
disable-wp;
bus-width = <4>;
status = "okay";
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
vmmc-supply = <&reg_dcdc1>;
vqmmc-supply = <&reg_dldo4>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
rtl8189etv: wifi@1 {
reg = <1>;
interrupt-parent = <&r_pio>;
interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */
interrupt-names = "host-wake";
};
};
&ohci0 {
status = "okay";
};
&ohci1 {
status = "okay";
};
&r_rsb {
status = "okay";
axp803: pmic@3a3 {
compatible = "x-powers,axp803";
reg = <0x3a3>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
};
};
#include "axp803.dtsi"
&ac_power_supply {
status = "okay";
};
&reg_aldo2 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-pl";
};
&reg_aldo3 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vcc-pll-avcc";
};
&reg_dcdc1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-3v3";
};
&reg_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1040000>;
regulator-max-microvolt = <1300000>;
regulator-name = "vdd-cpux";
};
/* DCDC3 is polyphased with DCDC2 */
&reg_dcdc5 {
regulator-always-on;
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-name = "vcc-dram";
};
&reg_dcdc6 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-sys";
};
&reg_dldo1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-hdmi-dsi";
};
&reg_dldo4 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vcc-pg-wifi-io";
};
&reg_eldo1 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "cpvdd";
};
&reg_fldo1 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vcc-1v2-hsic";
};
/*
* The A64 chip cannot work without this regulator off, although
* it seems to be only driving the AR100 core.
* Maybe we don't still know well about CPUs domain.
*/
&reg_fldo2 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpus";
};
&reg_rtc_ldo {
regulator-name = "vcc-rtc";
};
&simplefb_hdmi {
vcc-hdmi-supply = <&reg_dldo1>;
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
&usbphy {
status = "okay";
};

89
arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts
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@ -1,89 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2019 Oceanic Systems (UK) Ltd.
// Copyright (C) 2019 Amarula Solutions B.V.
// Author: Jagan Teki <jagan@amarulasolutions.com>
/dts-v1/;
#include "sun50i-a64-sopine.dtsi"
/ {
model = "Oceanic 5205 5inMFD";
compatible = "oceanic,5205-5inmfd", "allwinner,sun50i-a64";
aliases {
ethernet0 = &emac;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&ehci0 {
status = "okay";
};
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
phy-mode = "rgmii";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <&reg_dc1sw>;
allwinner,tx-delay-ps = <600>;
status = "okay";
};
&i2c0 {
status = "okay";
touchscreen@5d {
compatible = "goodix,gt911";
reg = <0x5d>;
AVDD28-supply = <&reg_ldo_io0>; /* VDD_CTP: GPIO0-LDO */
interrupt-parent = <&pio>;
interrupts = <7 4 IRQ_TYPE_EDGE_FALLING>;
irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* CTP-INT: PH4 */
reset-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* CTP-RST: PH11 */
touchscreen-inverted-x;
touchscreen-inverted-y;
};
};
&mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
&ohci0 {
status = "okay";
};
&reg_dc1sw {
regulator-name = "vcc-phy";
};
&reg_ldo_io0 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "vdd-ctp";
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
&usb_otg {
dr_mode = "host";
status = "okay";
};
&usbphy {
status = "okay";
};

25
arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts
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@ -1,25 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2018 Martin Ayotte <martinayotte@gmail.com>
// Copyright (C) 2019 Sunil Mohan Adapa <sunil@medhas.org>
#include "sun50i-a64-olinuxino.dts"
/ {
model = "Olimex A64-Olinuxino-eMMC";
compatible = "olimex,a64-olinuxino-emmc", "allwinner,sun50i-a64";
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
vmmc-supply = <&reg_dcdc1>;
vqmmc-supply = <&reg_eldo1>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
status = "okay";
};
&pio {
vcc-pc-supply = <&reg_eldo1>;
};

347
arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
/dts-v1/;
#include "sun50i-a64.dtsi"
#include "sun50i-a64-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Olimex A64-Olinuxino";
compatible = "olimex,a64-olinuxino", "allwinner,sun50i-a64";
aliases {
ethernet0 = &emac;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
leds {
compatible = "gpio-leds";
led-0 {
label = "a64-olinuxino:red:user";
gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */
};
};
reg_usb1_vbus: usb1-vbus {
compatible = "regulator-fixed";
regulator-name = "usb1-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
enable-active-high;
gpio = <&pio 6 9 GPIO_ACTIVE_HIGH>; /* PG9 */
status = "okay";
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
};
};
&cpu0 {
cpu-supply = <&reg_dcdc2>;
};
&cpu1 {
cpu-supply = <&reg_dcdc2>;
};
&cpu2 {
cpu-supply = <&reg_dcdc2>;
};
&cpu3 {
cpu-supply = <&reg_dcdc2>;
};
&de {
status = "okay";
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
phy-mode = "rgmii";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <&reg_dcdc1>;
allwinner,tx-delay-ps = <600>;
status = "okay";
};
&hdmi {
hvcc-supply = <&reg_dldo1>;
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
vmmc-supply = <&reg_dcdc1>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
disable-wp;
bus-width = <4>;
status = "okay";
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
vmmc-supply = <&reg_dcdc1>;
vqmmc-supply = <&reg_dldo4>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
rtl8723bs: wifi@1 {
reg = <1>;
interrupt-parent = <&r_pio>;
interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */
interrupt-names = "host-wake";
};
};
&ohci0 {
status = "okay";
};
&ohci1 {
status = "okay";
};
&pio {
vcc-pc-supply = <&reg_dcdc1>;
vcc-pd-supply = <&reg_dcdc1>;
vcc-pe-supply = <&reg_aldo1>;
vcc-pg-supply = <&reg_dldo4>;
};
&r_pio {
/*
* FIXME: We can't add that supply for now since it would
* create a circular dependency between pinctrl, the regulator
* and the RSB Bus.
*
* vcc-pl-supply = <&reg_aldo2>;
*/
};
&pio {
vcc-pa-supply = <&reg_dcdc1>;
vcc-pb-supply = <&reg_dcdc1>;
vcc-pc-supply = <&reg_dcdc1>;
vcc-pd-supply = <&reg_dcdc1>;
vcc-pe-supply = <&reg_aldo1>;
vcc-pf-supply = <&reg_dcdc1>;
vcc-pg-supply = <&reg_dldo4>;
vcc-ph-supply = <&reg_dcdc1>;
};
&r_rsb {
status = "okay";
axp803: pmic@3a3 {
compatible = "x-powers,axp803";
reg = <0x3a3>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */
};
};
/* VCC-PL is powered by aldo2 but we cannot add it as the RSB */
/* interface used to talk to the PMIC in on the PL pins */
/* &r_pio { */
/* vcc-pl-supply = <&reg_aldo2>; */
/* }; */
#include "axp803.dtsi"
&ac_power_supply {
status = "okay";
};
&battery_power_supply {
status = "okay";
};
&reg_aldo1 {
regulator-always-on;
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "vcc-pe";
};
&reg_aldo2 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-pl";
};
&reg_aldo3 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vcc-pll-avcc";
};
&reg_dcdc1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-3v3";
};
&reg_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1040000>;
regulator-max-microvolt = <1300000>;
regulator-name = "vdd-cpux";
};
/* DCDC3 is polyphased with DCDC2 */
/*
* The board uses DDR3L DRAM chips. 1.36V is the closest to the nominal
* 1.35V that the PMIC can drive.
*/
&reg_dcdc5 {
regulator-always-on;
regulator-min-microvolt = <1360000>;
regulator-max-microvolt = <1360000>;
regulator-name = "vcc-ddr3";
};
&reg_dcdc6 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-sys";
};
&reg_dldo1 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-hdmi";
};
&reg_dldo2 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-mipi";
};
&reg_dldo3 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "vcc-avdd-csi";
};
&reg_dldo4 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi-io";
};
&reg_drivevbus {
regulator-name = "usb0-vbus";
status = "okay";
};
&reg_eldo1 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "cpvdd";
};
&reg_eldo2 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-dvdd-csi";
};
&reg_fldo1 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vcc-1v2-hsic";
};
/*
* The A64 chip cannot work without this regulator off, although
* it seems to be only driving the AR100 core.
* Maybe we don't still know well about CPUs domain.
*/
&reg_fldo2 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpus";
};
&reg_rtc_ldo {
regulator-name = "vcc-rtc";
};
&simplefb_hdmi {
vcc-hdmi-supply = <&reg_dldo1>;
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
&usb_otg {
dr_mode = "otg";
status = "okay";
};
&usbphy {
status = "okay";
usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
usb0_vbus-supply = <&reg_drivevbus>;
usb1_vbus-supply = <&reg_usb1_vbus>;
};

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arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
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@ -1,413 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
// Copyright (C) 2017-2018 Samuel Holland <samuel@sholland.org>
/dts-v1/;
#include "sun50i-a64.dtsi"
#include "sun50i-a64-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "OrangePi Win/Win Plus";
compatible = "xunlong,orangepi-win", "allwinner,sun50i-a64";
aliases {
ethernet0 = &emac;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
serial4 = &uart4;
};
chosen {
stdout-path = "serial0:115200n8";
};
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
leds {
compatible = "gpio-leds";
status {
label = "orangepi:green:status";
gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */
};
};
reg_gmac_3v3: gmac-3v3 {
compatible = "regulator-fixed";
regulator-name = "gmac-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
enable-active-high;
gpio = <&pio 3 14 GPIO_ACTIVE_HIGH>; /* PD14 */
status = "okay";
};
reg_usb1_vbus: usb1-vbus {
compatible = "regulator-fixed";
regulator-name = "usb1-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
enable-active-high;
gpio = <&pio 3 7 GPIO_ACTIVE_HIGH>; /* PD7 */
status = "okay";
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>; /* PL8 */
clocks = <&rtc 1>;
clock-names = "ext_clock";
};
};
&codec {
status = "okay";
};
&codec_analog {
cpvdd-supply = <&reg_eldo1>;
status = "okay";
};
&cpu0 {
cpu-supply = <&reg_dcdc2>;
};
&cpu1 {
cpu-supply = <&reg_dcdc2>;
};
&cpu2 {
cpu-supply = <&reg_dcdc2>;
};
&cpu3 {
cpu-supply = <&reg_dcdc2>;
};
&dai {
status = "okay";
};
&de {
status = "okay";
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
phy-mode = "rgmii-id";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <&reg_gmac_3v3>;
status = "okay";
};
&hdmi {
hvcc-supply = <&reg_dldo1>;
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
vmmc-supply = <&reg_dcdc1>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
disable-wp;
bus-width = <4>;
status = "okay";
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
vmmc-supply = <&reg_dldo2>;
vqmmc-supply = <&reg_dldo4>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&r_pio>;
interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */
interrupt-names = "host-wake";
};
};
&ohci0 {
status = "okay";
};
&ohci1 {
status = "okay";
};
&r_ir {
status = "okay";
};
&r_rsb {
status = "okay";
axp803: pmic@3a3 {
compatible = "x-powers,axp803";
reg = <0x3a3>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */
};
};
#include "axp803.dtsi"
&ac_power_supply {
status = "okay";
};
&battery_power_supply {
status = "okay";
};
&reg_aldo1 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "afvcc-csi";
};
&reg_aldo2 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-pl";
};
&reg_aldo3 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vcc-pll-avcc";
};
&reg_dcdc1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-3v3";
};
&reg_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1040000>;
regulator-max-microvolt = <1300000>;
regulator-name = "vdd-cpux";
};
/* DCDC3 is polyphased with DCDC2 */
&reg_dcdc5 {
regulator-always-on;
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-name = "vcc-dram";
};
&reg_dcdc6 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-sys";
};
&reg_dldo1 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-hdmi-dsi";
};
&reg_dldo2 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi";
};
&reg_dldo3 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "avdd-csi";
};
&reg_dldo4 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi-io";
};
&reg_drivevbus {
regulator-name = "usb0-vbus";
status = "okay";
};
&reg_eldo1 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "cpvdd";
};
&reg_eldo3 {
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1800000>;
regulator-name = "dvdd-csi";
};
&reg_fldo1 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vcc-1v2-hsic";
};
/*
* The A64 chip cannot work without this regulator off, although
* it seems to be only driving the AR100 core.
* Maybe we don't still know well about CPUs domain.
*/
&reg_fldo2 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpus";
};
&reg_rtc_ldo {
regulator-name = "vcc-rtc";
};
&simplefb_hdmi {
vcc-hdmi-supply = <&reg_dldo1>;
};
&sound {
status = "okay";
simple-audio-card,widgets = "Headphone", "Headphone Jack",
"Microphone", "Microphone Jack",
"Microphone", "Onboard Microphone";
simple-audio-card,routing =
"Left DAC", "DACL",
"Right DAC", "DACR",
"ADCL", "Left ADC",
"ADCR", "Right ADC",
"Headphone Jack", "HP",
"MIC2", "Microphone Jack",
"Onboard Microphone", "MBIAS",
"MIC1", "Onboard Microphone";
};
&spi0 {
status = "okay";
spi-flash@0 {
compatible = "mxicy,mx25l1606e", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <80000000>;
m25p,fast-read;
status = "okay";
};
};
/* On debug connector */
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
/* Bluetooth */
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
uart-has-rtscts;
status = "okay";
bluetooth {
compatible = "brcm,bcm43438-bt";
max-speed = <1500000>;
clocks = <&rtc 1>;
clock-names = "lpo";
vbat-supply = <&reg_dldo2>;
vddio-supply = <&reg_dldo4>;
device-wakeup-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
host-wakeup-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
shutdown-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
};
};
/* On Pi-2 connector, RTS/CTS optional */
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "disabled";
};
/* On Pi-2 connector, RTS/CTS optional */
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
status = "disabled";
};
/* On Pi-2 connector (labeled for SPI1), RTS/CTS optional */
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins>;
status = "disabled";
};
&usb_otg {
dr_mode = "otg";
status = "okay";
};
&usbphy {
usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
usb0_vbus-supply = <&reg_drivevbus>;
usb1_vbus-supply = <&reg_usb1_vbus>;
status = "okay";
};

14
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts
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@ -1,14 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (c) 2018 ARM Ltd.
#include "sun50i-a64-sopine-baseboard.dts"
/ {
model = "Pine64 LTS";
compatible = "pine64,pine64-lts", "allwinner,sun50i-r18",
"allwinner,sun50i-a64";
};
&mmc0 {
broken-cd; /* card detect is broken on *some* boards */
};

35
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
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@ -1,35 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (c) 2016 ARM Ltd.
#include "sun50i-a64-pine64.dts"
/ {
model = "Pine64+";
compatible = "pine64,pine64-plus", "allwinner,sun50i-a64";
/* TODO: Camera, touchscreen, etc. */
};
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
phy-mode = "rgmii-txid";
phy-handle = <&ext_rgmii_phy>;
status = "okay";
};
&mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
&reg_dc1sw {
/*
* Ethernet PHY needs 30ms to properly power up and some more
* to initialize. 100ms should be plenty of time to finish
* whole process.
*/
regulator-enable-ramp-delay = <100000>;
};

320
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
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@ -1,320 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (c) 2016 ARM Ltd.
/dts-v1/;
#include "sun50i-a64.dtsi"
#include "sun50i-a64-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Pine64";
compatible = "pine64,pine64", "allwinner,sun50i-a64";
aliases {
ethernet0 = &emac;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
serial4 = &uart4;
};
chosen {
stdout-path = "serial0:115200n8";
};
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
};
&codec {
status = "okay";
};
&codec_analog {
cpvdd-supply = <&reg_eldo1>;
status = "okay";
};
&cpu0 {
cpu-supply = <&reg_dcdc2>;
};
&cpu1 {
cpu-supply = <&reg_dcdc2>;
};
&cpu2 {
cpu-supply = <&reg_dcdc2>;
};
&cpu3 {
cpu-supply = <&reg_dcdc2>;
};
&dai {
status = "okay";
};
&de {
status = "okay";
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rmii_pins>;
phy-mode = "rmii";
phy-handle = <&ext_rmii_phy1>;
phy-supply = <&reg_dc1sw>;
status = "okay";
};
&hdmi {
hvcc-supply = <&reg_dldo1>;
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&i2c1 {
status = "okay";
};
&i2c1_pins {
bias-pull-up;
};
&mdio {
ext_rmii_phy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
vmmc-supply = <&reg_dcdc1>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
disable-wp;
bus-width = <4>;
status = "okay";
};
&ohci0 {
status = "okay";
};
&ohci1 {
status = "okay";
};
&r_rsb {
status = "okay";
axp803: pmic@3a3 {
compatible = "x-powers,axp803";
reg = <0x3a3>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
};
};
#include "axp803.dtsi"
&ac_power_supply {
status = "okay";
};
&battery_power_supply {
status = "okay";
};
&reg_aldo2 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-pl";
};
&reg_aldo3 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vcc-pll-avcc";
};
&reg_dc1sw {
regulator-name = "vcc-phy";
};
&reg_dcdc1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-3v3";
};
&reg_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1040000>;
regulator-max-microvolt = <1300000>;
regulator-name = "vdd-cpux";
};
/* DCDC3 is polyphased with DCDC2 */
/*
* The DRAM chips used by Pine64 boards are DDR3L-compatible, so they can
* work at 1.35V with less power consumption.
* As AXP803 DCDC5 cannot reach 1.35V accurately, use 1.36V instead.
*/
&reg_dcdc5 {
regulator-always-on;
regulator-min-microvolt = <1360000>;
regulator-max-microvolt = <1360000>;
regulator-name = "vcc-dram";
};
&reg_dcdc6 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-sys";
};
&reg_dldo1 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-hdmi";
};
&reg_dldo2 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-mipi";
};
&reg_dldo4 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi";
};
&reg_eldo1 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "cpvdd";
};
&reg_fldo1 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vcc-1v2-hsic";
};
/*
* The A64 chip cannot work without this regulator off, although
* it seems to be only driving the AR100 core.
* Maybe we don't still know well about CPUs domain.
*/
&reg_fldo2 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpus";
};
&reg_rtc_ldo {
regulator-name = "vcc-rtc";
};
&simplefb_hdmi {
vcc-hdmi-supply = <&reg_dldo1>;
};
&sound {
simple-audio-card,aux-devs = <&codec_analog>;
simple-audio-card,widgets = "Microphone", "Microphone Jack",
"Headphone", "Headphone Jack";
simple-audio-card,routing =
"Left DAC", "DACL",
"Right DAC", "DACR",
"Headphone Jack", "HP",
"ADCL", "Left ADC",
"ADCR", "Right ADC",
"MIC2", "Microphone Jack";
status = "okay";
};
/* On Euler connector */
&spdif {
status = "disabled";
};
/* On Exp and Euler connectors */
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
/* On Wifi/BT connector, with RTS/CTS */
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
status = "disabled";
};
/* On Pi-2 connector */
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "disabled";
};
/* On Euler connector */
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
status = "disabled";
};
/* On Euler connector, RTS/CTS optional */
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins>;
status = "disabled";
};
&usb_otg {
dr_mode = "host";
status = "okay";
};
&usbphy {
status = "okay";
};

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arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.xyz>
// Copyright (C) 2018 Vasily Khoruzhick <anarsoul@gmail.com>
/dts-v1/;
#include "sun50i-a64.dtsi"
#include "sun50i-a64-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/gpio-keys.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pwm/pwm.h>
/ {
model = "Pinebook";
compatible = "pine64,pinebook", "allwinner,sun50i-a64";
aliases {
serial0 = &uart0;
ethernet0 = &rtl8723cs;
};
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm 0 50000 0>;
brightness-levels = <0 5 10 15 20 30 40 55 70 85 100>;
default-brightness-level = <2>;
enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
power-supply = <&reg_vbklt>;
};
chosen {
stdout-path = "serial0:115200n8";
};
gpio_keys {
compatible = "gpio-keys";
lid_switch {
label = "Lid Switch";
gpios = <&r_pio 0 12 GPIO_ACTIVE_LOW>; /* PL12 */
linux,input-type = <EV_SW>;
linux,code = <SW_LID>;
linux,can-disable;
wakeup-source;
wakeup-event-action = <EV_ACT_DEASSERTED>;
};
};
panel_edp: panel-edp {
compatible = "neweast,wjfh116008a";
backlight = <&backlight>;
power-supply = <&reg_dc1sw>;
port {
panel_edp_in: endpoint {
remote-endpoint = <&anx6345_out_edp>;
};
};
};
reg_vbklt: vbklt {
compatible = "regulator-fixed";
regulator-name = "vbklt";
regulator-min-microvolt = <18000000>;
regulator-max-microvolt = <18000000>;
gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
enable-active-high;
};
reg_vcc5v0: vcc5v0 {
compatible = "regulator-fixed";
regulator-name = "vcc5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&axp_gpio 0 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
};
speaker_amp: audio-amplifier {
compatible = "simple-audio-amplifier";
VCC-supply = <&reg_vcc5v0>;
enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
sound-name-prefix = "Speaker Amp";
};
};
&codec {
status = "okay";
};
&codec_analog {
cpvdd-supply = <&reg_eldo1>;
status = "okay";
};
&cpu0 {
cpu-supply = <&reg_dcdc2>;
};
&cpu1 {
cpu-supply = <&reg_dcdc2>;
};
&cpu2 {
cpu-supply = <&reg_dcdc2>;
};
&cpu3 {
cpu-supply = <&reg_dcdc2>;
};
&dai {
status = "okay";
};
&de {
status = "okay";
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
&mixer0 {
status = "okay";
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
vmmc-supply = <&reg_dcdc1>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
disable-wp;
bus-width = <4>;
status = "okay";
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
vmmc-supply = <&reg_dldo4>;
vqmmc-supply = <&reg_eldo1>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
rtl8723cs: wifi@1 {
reg = <1>;
};
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>, <&mmc2_ds_pin>;
vmmc-supply = <&reg_dcdc1>;
vqmmc-supply = <&reg_eldo1>;
max-frequency = <200000000>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
mmc-hs200-1_8v;
status = "okay";
};
&ohci0 {
status = "okay";
};
&ohci1 {
status = "okay";
};
&pio {
vcc-pc-supply = <&reg_eldo1>;
vcc-pd-supply = <&reg_dcdc1>;
vcc-pe-supply = <&reg_aldo1>;
vcc-pg-supply = <&reg_eldo1>;
};
&pwm {
status = "okay";
};
&r_i2c {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&r_i2c_pl89_pins>;
status = "okay";
anx6345: anx6345@38 {
compatible = "analogix,anx6345";
reg = <0x38>;
reset-gpios = <&pio 3 24 GPIO_ACTIVE_LOW>; /* PD24 */
dvdd25-supply = <&reg_dldo2>;
dvdd12-supply = <&reg_fldo1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
anx6345_in: port@0 {
reg = <0>;
anx6345_in_tcon0: endpoint {
remote-endpoint = <&tcon0_out_anx6345>;
};
};
anx6345_out: port@1 {
reg = <1>;
anx6345_out_edp: endpoint {
remote-endpoint = <&panel_edp_in>;
};
};
};
};
};
&r_pio {
/*
* FIXME: We can't add that supply for now since it would
* create a circular dependency between pinctrl, the regulator
* and the RSB Bus.
*
* vcc-pl-supply = <&reg_aldo2>;
*/
};
&r_rsb {
status = "okay";
axp803: pmic@3a3 {
compatible = "x-powers,axp803";
reg = <0x3a3>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
};
};
#include "axp803.dtsi"
&ac_power_supply {
status = "okay";
};
&battery_power_supply {
status = "okay";
};
&reg_aldo1 {
regulator-name = "vcc-pe";
};
&reg_aldo2 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-pl";
};
&reg_aldo3 {
regulator-always-on;
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-pll-avcc";
};
&reg_dc1sw {
regulator-name = "vcc-lcd";
};
&reg_dcdc1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-3v3";
};
&reg_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1300000>;
regulator-name = "vdd-cpux";
};
/* DCDC3 is polyphased with DCDC2 */
&reg_dcdc5 {
regulator-always-on;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vcc-dram";
};
&reg_dcdc6 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-sys";
};
&reg_dldo1 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-hdmi";
};
&reg_dldo2 {
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
regulator-name = "vcc-edp";
};
&reg_dldo4 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi";
};
&reg_eldo1 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "cpvdd";
};
&reg_fldo1 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vcc-1v2-hsic";
};
&reg_fldo2 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpus";
};
&reg_rtc_ldo {
regulator-name = "vcc-rtc";
};
&simplefb_lcd {
panel-supply = <&reg_dc1sw>;
dvdd25-supply = <&reg_dldo2>;
dvdd12-supply = <&reg_fldo1>;
};
&simplefb_hdmi {
vcc-hdmi-supply = <&reg_dldo1>;
};
&sound {
status = "okay";
simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>;
simple-audio-card,widgets = "Microphone", "Internal Microphone Left",
"Microphone", "Internal Microphone Right",
"Headphone", "Headphone Jack",
"Speaker", "Internal Speaker";
simple-audio-card,routing =
"Left DAC", "DACL",
"Right DAC", "DACR",
"Speaker Amp INL", "LINEOUT",
"Speaker Amp INR", "LINEOUT",
"Internal Speaker", "Speaker Amp OUTL",
"Internal Speaker", "Speaker Amp OUTR",
"Headphone Jack", "HP",
"ADCL", "Left ADC",
"ADCR", "Right ADC",
"Internal Microphone Left", "MBIAS",
"MIC1", "Internal Microphone Left",
"Internal Microphone Right", "HBIAS",
"MIC2", "Internal Microphone Right";
};
&tcon0 {
pinctrl-names = "default";
pinctrl-0 = <&lcd_rgb666_pins>;
status = "okay";
};
&tcon0_out {
tcon0_out_anx6345: endpoint {
remote-endpoint = <&anx6345_in_tcon0>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
&usb_otg {
dr_mode = "host";
};
&usbphy {
usb0_vbus-supply = <&reg_vcc5v0>;
usb1_vbus-supply = <&reg_vcc5v0>;
status = "okay";
};

11
arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.0.dts
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@ -1,11 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2020 Ondrej Jirman <megous@megous.com>
/dts-v1/;
#include "sun50i-a64-pinephone.dtsi"
/ {
model = "Pine64 PinePhone Developer Batch (1.0)";
compatible = "pine64,pinephone-1.0", "allwinner,sun50i-a64";
};

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arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts
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@ -1,30 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2020 Ondrej Jirman <megous@megous.com>
/dts-v1/;
#include "sun50i-a64-pinephone.dtsi"
/ {
model = "Pine64 PinePhone Braveheart (1.1)";
compatible = "pine64,pinephone-1.1", "allwinner,sun50i-a64";
};
&backlight {
power-supply = <&reg_ldo_io0>;
/*
* PWM backlight circuit on this PinePhone revision was changed since
* 1.0, and the lowest PWM duty cycle that doesn't lead to backlight
* being off is around 20%. Duty cycle for the lowest brightness level
* also varries quite a bit between individual boards, so the lowest
* value here was chosen as a safe default.
*/
brightness-levels = <
774 793 814 842
882 935 1003 1088
1192 1316 1462 1633
1830 2054 2309 2596
2916 3271 3664 4096>;
num-interpolated-steps = <50>;
default-brightness-level = <400>;
};

40
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2020 Ondrej Jirman <megous@megous.com>
/dts-v1/;
#include "sun50i-a64-pinephone.dtsi"
/ {
model = "Pine64 PinePhone (1.2)";
compatible = "pine64,pinephone-1.2", "allwinner,sun50i-a64";
};
&backlight {
power-supply = <&reg_ldo_io0>;
/*
* PWM backlight circuit on this PinePhone revision was changed since 1.0,
* and the lowest PWM duty cycle that doesn't lead to backlight being off
* is around 10%. Duty cycle for the lowest brightness level also varries
* quite a bit between individual boards, so the lowest value here was
* chosen as a safe default.
*/
brightness-levels = <
5000 5248 5506 5858 6345
6987 7805 8823 10062 11543
13287 15317 17654 20319 23336
26724 30505 34702 39335 44427
50000
>;
num-interpolated-steps = <50>;
default-brightness-level = <500>;
};
&lis3mdl {
/*
* Board revision 1.2 fixed routing of the interrupt to DRDY pin,
* enable interrupts.
*/
interrupt-parent = <&pio>;
interrupts = <1 1 IRQ_TYPE_EDGE_RISING>; /* PB1 */
};

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@ -1,429 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.xyz>
// Copyright (C) 2020 Martijn Braam <martijn@brixit.nl>
// Copyright (C) 2020 Ondrej Jirman <megous@megous.com>
#include "sun50i-a64.dtsi"
#include "sun50i-a64-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pwm/pwm.h>
/ {
aliases {
serial0 = &uart0;
};
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&r_pwm 0 50000 PWM_POLARITY_INVERTED>;
enable-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */
/* Backlight configuration differs per PinePhone revision. */
};
chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
blue {
function = LED_FUNCTION_INDICATOR;
color = <LED_COLOR_ID_BLUE>;
gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */
};
green {
function = LED_FUNCTION_INDICATOR;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 3 18 GPIO_ACTIVE_HIGH>; /* PD18 */
};
red {
function = LED_FUNCTION_INDICATOR;
color = <LED_COLOR_ID_RED>;
gpios = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */
};
};
speaker_amp: audio-amplifier {
compatible = "simple-audio-amplifier";
enable-gpios = <&pio 2 7 GPIO_ACTIVE_HIGH>; /* PC7 */
sound-name-prefix = "Speaker Amp";
};
vibrator {
compatible = "gpio-vibrator";
enable-gpios = <&pio 3 2 GPIO_ACTIVE_HIGH>; /* PD2 */
vcc-supply = <&reg_dcdc1>;
};
};
&codec {
status = "okay";
};
&codec_analog {
cpvdd-supply = <&reg_eldo1>;
status = "okay";
};
&cpu0 {
cpu-supply = <&reg_dcdc2>;
};
&cpu1 {
cpu-supply = <&reg_dcdc2>;
};
&cpu2 {
cpu-supply = <&reg_dcdc2>;
};
&cpu3 {
cpu-supply = <&reg_dcdc2>;
};
&dai {
status = "okay";
};
&de {
status = "okay";
};
&dphy {
status = "okay";
};
&dsi {
vcc-dsi-supply = <&reg_dldo1>;
status = "okay";
panel@0 {
compatible = "xingbangda,xbd599";
reg = <0>;
reset-gpios = <&pio 3 23 GPIO_ACTIVE_LOW>; /* PD23 */
iovcc-supply = <&reg_dldo2>;
vcc-supply = <&reg_ldo_io0>;
backlight = <&backlight>;
};
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
&i2c0 {
status = "okay";
touchscreen@5d {
compatible = "goodix,gt917s";
reg = <0x5d>;
interrupt-parent = <&pio>;
interrupts = <7 4 IRQ_TYPE_LEVEL_HIGH>; /* PH4 */
irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
reset-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */
AVDD28-supply = <&reg_ldo_io0>;
VDDIO-supply = <&reg_ldo_io0>;
touchscreen-size-x = <720>;
touchscreen-size-y = <1440>;
};
};
&i2c1 {
status = "okay";
/* Magnetometer */
lis3mdl: lis3mdl@1e {
compatible = "st,lis3mdl-magn";
reg = <0x1e>;
vdd-supply = <&reg_dldo1>;
vddio-supply = <&reg_dldo1>;
};
/* Accelerometer/gyroscope */
mpu6050@68 {
compatible = "invensense,mpu6050";
reg = <0x68>;
interrupt-parent = <&pio>;
interrupts = <7 5 IRQ_TYPE_EDGE_RISING>; /* PH5 */
vdd-supply = <&reg_dldo1>;
vddio-supply = <&reg_dldo1>;
};
};
/* Connected to pogo pins (external spring based pinheader for user addons) */
&i2c2 {
status = "okay";
};
&lradc {
vref-supply = <&reg_aldo3>;
status = "okay";
button-200 {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
channel = <0>;
voltage = <200000>;
};
button-400 {
label = "Volume Down";
linux,code = <KEY_VOLUMEDOWN>;
channel = <0>;
voltage = <400000>;
};
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
vmmc-supply = <&reg_dcdc1>;
vqmmc-supply = <&reg_dcdc1>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
disable-wp;
bus-width = <4>;
status = "okay";
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
vmmc-supply = <&reg_dcdc1>;
vqmmc-supply = <&reg_dcdc1>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
status = "okay";
};
&ohci0 {
status = "okay";
};
&ohci1 {
status = "okay";
};
&pio {
vcc-pb-supply = <&reg_dcdc1>;
vcc-pc-supply = <&reg_dcdc1>;
vcc-pd-supply = <&reg_dcdc1>;
vcc-pe-supply = <&reg_aldo1>;
vcc-pf-supply = <&reg_dcdc1>;
vcc-pg-supply = <&reg_dldo4>;
vcc-ph-supply = <&reg_dcdc1>;
};
&r_pio {
/*
* FIXME: We can't add that supply for now since it would
* create a circular dependency between pinctrl, the regulator
* and the RSB Bus.
*
* vcc-pl-supply = <&reg_aldo2>;
*/
};
&r_pwm {
status = "okay";
};
&r_rsb {
status = "okay";
axp803: pmic@3a3 {
compatible = "x-powers,axp803";
reg = <0x3a3>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
};
};
#include "axp803.dtsi"
&ac_power_supply {
status = "okay";
};
&battery_power_supply {
status = "okay";
};
&reg_aldo1 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "dovdd-csi";
};
&reg_aldo2 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-pl";
};
&reg_aldo3 {
regulator-always-on;
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-pll-avcc";
};
&reg_dcdc1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-3v3";
};
&reg_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1300000>;
regulator-name = "vdd-cpux";
};
/* DCDC3 is polyphased with DCDC2 */
&reg_dcdc5 {
regulator-always-on;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vcc-dram";
};
&reg_dcdc6 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-sys";
};
&reg_dldo1 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-dsi-sensor";
};
&reg_dldo2 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-mipi-io";
};
&reg_dldo3 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "avdd-csi";
};
&reg_dldo4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-wifi-io";
};
&reg_eldo1 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-lpddr";
};
&reg_eldo3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "dvdd-1v8-csi";
};
&reg_fldo1 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vcc-1v2-hsic";
};
&reg_fldo2 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpus";
};
&reg_ldo_io0 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-lcd-ctp-stk";
status = "okay";
};
&reg_ldo_io1 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-1v8-typec";
status = "okay";
};
&reg_rtc_ldo {
regulator-name = "vcc-rtc";
};
&sound {
status = "okay";
simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>;
simple-audio-card,widgets = "Microphone", "Headset Microphone",
"Microphone", "Internal Microphone",
"Headphone", "Headphone Jack",
"Speaker", "Internal Earpiece",
"Speaker", "Internal Speaker";
simple-audio-card,routing =
"Headphone Jack", "HP",
"Internal Earpiece", "EARPIECE",
"Internal Speaker", "Speaker Amp OUTL",
"Internal Speaker", "Speaker Amp OUTR",
"Speaker Amp INL", "LINEOUT",
"Speaker Amp INR", "LINEOUT",
"Left DAC", "DACL",
"Right DAC", "DACR",
"ADCL", "Left ADC",
"ADCR", "Right ADC",
"Internal Microphone", "MBIAS",
"MIC1", "Internal Microphone",
"Headset Microphone", "HBIAS",
"MIC2", "Headset Microphone";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
/* Connected to the modem (hardware flow control can't be used) */
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
status = "okay";
};
&usb_otg {
dr_mode = "peripheral";
status = "okay";
};
&usb_power_supply {
status = "okay";
};
&usbphy {
status = "okay";
};

457
arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts
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@ -1,457 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.xyz>
*
*/
/dts-v1/;
#include "sun50i-a64.dtsi"
#include "sun50i-a64-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pwm/pwm.h>
/ {
model = "PineTab";
compatible = "pine64,pinetab", "allwinner,sun50i-a64";
aliases {
serial0 = &uart0;
ethernet0 = &rtl8723cs;
};
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
brightness-levels = <0 16 18 20 22 24 26 29 32 35 38 42 46 51 56 62 68 75 83 91 100>;
default-brightness-level = <15>;
enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
power-supply = <&vdd_bl>;
};
chosen {
stdout-path = "serial0:115200n8";
};
i2c-csi {
compatible = "i2c-gpio";
sda-gpios = <&pio 4 13 GPIO_ACTIVE_HIGH>; /* PE13 */
scl-gpios = <&pio 4 12 GPIO_ACTIVE_HIGH>; /* PE12 */
i2c-gpio,delay-us = <5>;
#address-cells = <1>;
#size-cells = <0>;
/* Rear camera */
ov5640: camera@3c {
compatible = "ovti,ov5640";
reg = <0x3c>;
pinctrl-names = "default";
pinctrl-0 = <&csi_mclk_pin>;
clocks = <&ccu CLK_CSI_MCLK>;
clock-names = "xclk";
AVDD-supply = <&reg_dldo3>;
DOVDD-supply = <&reg_aldo1>;
DVDD-supply = <&reg_eldo3>;
reset-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>; /* PE14 */
powerdown-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 */
port {
ov5640_ep: endpoint {
remote-endpoint = <&csi_ep>;
bus-width = <8>;
hsync-active = <1>; /* Active high */
vsync-active = <0>; /* Active low */
data-active = <1>; /* Active high */
pclk-sample = <1>; /* Rising */
};
};
};
};
speaker_amp: audio-amplifier {
compatible = "simple-audio-amplifier";
enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
sound-name-prefix = "Speaker Amp";
};
vdd_bl: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "bl-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
enable-active-high;
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
post-power-on-delay-ms = <200>;
};
};
&codec {
status = "okay";
};
&codec_analog {
cpvdd-supply = <&reg_eldo1>;
status = "okay";
};
&cpu0 {
cpu-supply = <&reg_dcdc2>;
};
&cpu1 {
cpu-supply = <&reg_dcdc2>;
};
&cpu2 {
cpu-supply = <&reg_dcdc2>;
};
&cpu3 {
cpu-supply = <&reg_dcdc2>;
};
&csi {
status = "okay";
port {
csi_ep: endpoint {
remote-endpoint = <&ov5640_ep>;
bus-width = <8>;
hsync-active = <1>; /* Active high */
vsync-active = <0>; /* Active low */
data-active = <1>; /* Active high */
pclk-sample = <1>; /* Rising */
};
};
};
&dai {
status = "okay";
};
&de {
status = "okay";
};
&dphy {
status = "okay";
};
&dsi {
vcc-dsi-supply = <&reg_dldo1>;
status = "okay";
panel@0 {
compatible = "feixin,k101-im2ba02";
reg = <0>;
avdd-supply = <&reg_dc1sw>;
dvdd-supply = <&reg_dc1sw>;
cvdd-supply = <&reg_ldo_io1>;
reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
backlight = <&backlight>;
};
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
&i2c0 {
status = "okay";
touchscreen@5d {
compatible = "goodix,gt9271";
reg = <0x5d>;
interrupt-parent = <&pio>;
interrupts = <7 4 IRQ_TYPE_LEVEL_HIGH>; /* PH4 */
irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
reset-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* PH8 */
AVDD28-supply = <&reg_ldo_io1>;
};
};
&i2c0_pins {
bias-pull-up;
};
&i2c1 {
status = "okay";
/* TODO: add Bochs BMA223 accelerometer here */
};
&lradc {
vref-supply = <&reg_aldo3>;
status = "okay";
button-200 {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
channel = <0>;
voltage = <200000>;
};
button-400 {
label = "Volume Down";
linux,code = <KEY_VOLUMEDOWN>;
channel = <0>;
voltage = <400000>;
};
};
&mixer1 {
status = "okay";
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
vmmc-supply = <&reg_dcdc1>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
disable-wp;
bus-width = <4>;
status = "okay";
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
vmmc-supply = <&reg_dldo4>;
vqmmc-supply = <&reg_eldo1>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
rtl8723cs: wifi@1 {
reg = <1>;
};
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
vmmc-supply = <&reg_dcdc1>;
vqmmc-supply = <&reg_dcdc1>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
status = "okay";
};
&ohci0 {
status = "okay";
};
&pwm {
status = "okay";
};
&r_rsb {
status = "okay";
axp803: pmic@3a3 {
compatible = "x-powers,axp803";
reg = <0x3a3>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
x-powers,drive-vbus-en;
};
};
#include "axp803.dtsi"
&ac_power_supply {
status = "okay";
};
&battery_power_supply {
status = "okay";
};
&reg_aldo1 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "dovdd-csi";
};
&reg_aldo2 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-pl";
};
&reg_aldo3 {
regulator-always-on;
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-pll-avcc";
};
&reg_dc1sw {
regulator-name = "vcc-lcd";
};
&reg_dcdc1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-3v3";
};
&reg_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1300000>;
regulator-name = "vdd-cpux";
};
/* DCDC3 is polyphased with DCDC2 */
&reg_dcdc5 {
regulator-always-on;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vcc-dram";
};
&reg_dcdc6 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-sys";
};
&reg_dldo1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-hdmi-dsi-sensor";
};
&reg_dldo3 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "avdd-csi";
};
&reg_dldo4 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi";
};
&reg_drivevbus {
regulator-name = "usb0-vbus";
status = "okay";
};
&reg_eldo1 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "cpvdd";
};
&reg_eldo2 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcca-1v8";
};
&reg_eldo3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "dvdd-1v8-csi";
};
&reg_fldo1 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vcc-1v2-hsic";
};
&reg_fldo2 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpus";
};
&reg_ldo_io0 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-usb";
status = "okay";
};
&reg_ldo_io1 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-enable-ramp-delay = <3500000>;
regulator-name = "vcc-touchscreen";
status = "okay";
};
&reg_rtc_ldo {
regulator-name = "vcc-rtc";
};
&sound {
status = "okay";
simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>;
simple-audio-card,widgets = "Microphone", "Internal Microphone Left",
"Microphone", "Internal Microphone Right",
"Headphone", "Headphone Jack",
"Speaker", "Internal Speaker";
simple-audio-card,routing =
"Left DAC", "DACL",
"Right DAC", "DACR",
"Speaker Amp INL", "LINEOUT",
"Speaker Amp INR", "LINEOUT",
"Internal Speaker", "Speaker Amp OUTL",
"Internal Speaker", "Speaker Amp OUTR",
"Headphone Jack", "HP",
"ADCL", "Left ADC",
"ADCR", "Right ADC",
"Internal Microphone Left", "MBIAS",
"MIC1", "Internal Microphone Left",
"Internal Microphone Right", "HBIAS",
"MIC2", "Internal Microphone Right";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
&usb_otg {
dr_mode = "otg";
status = "okay";
};
&usb_power_supply {
status = "okay";
};
&usbphy {
usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
usb0_vbus_power-supply = <&usb_power_supply>;
usb0_vbus-supply = <&reg_drivevbus>;
usb1_vbus-supply = <&reg_ldo_io0>;
status = "okay";
};

205
arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
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@ -1,205 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (c) 2017 Icenowy Zheng <icenowy@aosc.xyz>
// Based on sun50i-a64-pine64.dts, which is:
// Copyright (c) 2016 ARM Ltd.
/dts-v1/;
#include "sun50i-a64-sopine.dtsi"
/ {
model = "SoPine with baseboard";
compatible = "pine64,sopine-baseboard", "pine64,sopine",
"allwinner,sun50i-a64";
aliases {
ethernet0 = &emac;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
serial4 = &uart4;
};
chosen {
stdout-path = "serial0:115200n8";
};
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
reg_vcc1v8: vcc1v8 {
compatible = "regulator-fixed";
regulator-name = "vcc1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
};
&ac_power_supply {
status = "okay";
};
&battery_power_supply {
status = "okay";
};
&codec {
status = "okay";
};
&codec_analog {
status = "okay";
};
&dai {
status = "okay";
};
&de {
status = "okay";
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
phy-mode = "rgmii-txid";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <&reg_dc1sw>;
status = "okay";
};
&hdmi {
hvcc-supply = <&reg_dldo1>;
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
vmmc-supply = <&reg_dcdc1>;
vqmmc-supply = <&reg_vcc1v8>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
status = "okay";
};
&ohci0 {
status = "okay";
};
&ohci1 {
status = "okay";
};
&reg_dc1sw {
/*
* Ethernet PHY needs 30ms to properly power up and some more
* to initialize. 100ms should be plenty of time to finish
* whole process.
*/
regulator-enable-ramp-delay = <100000>;
regulator-name = "vcc-phy";
};
&reg_dldo1 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-hdmi";
};
&reg_dldo2 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-mipi";
};
&reg_dldo4 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi";
};
&simplefb_hdmi {
vcc-hdmi-supply = <&reg_dldo1>;
};
&sound {
simple-audio-card,aux-devs = <&codec_analog>;
simple-audio-card,widgets = "Microphone", "Microphone Jack",
"Headphone", "Headphone Jack";
simple-audio-card,routing =
"Left DAC", "DACL",
"Right DAC", "DACR",
"Headphone Jack", "HP",
"ADCL", "Left ADC",
"ADCR", "Right ADC",
"MIC2", "Microphone Jack";
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
/* On Pi-2 connector */
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "disabled";
};
/* On Euler connector */
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
status = "disabled";
};
/* On Euler connector, RTS/CTS optional */
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins>;
status = "disabled";
};
&usb_otg {
dr_mode = "host";
status = "okay";
};
&usbphy {
status = "okay";
};

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arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (c) 2017 Icenowy Zheng <icenowy@aosc.xyz>
// Based on sun50i-a64-pine64.dts, which is:
// Copyright (c) 2016 ARM Ltd.
#include "sun50i-a64.dtsi"
#include "sun50i-a64-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
&codec_analog {
cpvdd-supply = <&reg_eldo1>;
};
&cpu0 {
cpu-supply = <&reg_dcdc2>;
};
&cpu1 {
cpu-supply = <&reg_dcdc2>;
};
&cpu2 {
cpu-supply = <&reg_dcdc2>;
};
&cpu3 {
cpu-supply = <&reg_dcdc2>;
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
vmmc-supply = <&reg_dcdc1>;
disable-wp;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 push-pull switch */
status = "okay";
};
&r_rsb {
status = "okay";
axp803: pmic@3a3 {
compatible = "x-powers,axp803";
reg = <0x3a3>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
};
};
&spi0 {
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <40000000>;
};
};
#include "axp803.dtsi"
&reg_aldo2 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-pl";
};
&reg_aldo3 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vcc-pll-avcc";
};
&reg_dcdc1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-3v3";
};
&reg_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1040000>;
regulator-max-microvolt = <1300000>;
regulator-name = "vdd-cpux";
};
/* DCDC3 is polyphased with DCDC2 */
&reg_dcdc5 {
regulator-always-on;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vcc-dram";
};
&reg_dcdc6 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-sys";
};
&reg_eldo1 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vdd-1v8-lpddr";
};
&reg_fldo1 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vcc-1v2-hsic";
};
/*
* The A64 chip cannot work without this regulator off, although
* it seems to be only driving the AR100 core.
* Maybe we don't still know well about CPUs domain.
*/
&reg_fldo2 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpus";
};
&reg_rtc_ldo {
regulator-name = "vcc-rtc";
};

382
arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts
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@ -1,382 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
// Copyright (C) Harald Geyer <harald@ccbib.org>
// based on sun50i-a64-olinuxino.dts by Jagan Teki <jteki@openedev.com>
/dts-v1/;
#include "sun50i-a64.dtsi"
#include "sun50i-a64-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pwm/pwm.h>
/ {
model = "Olimex A64 Teres-I";
compatible = "olimex,a64-teres-i", "allwinner,sun50i-a64";
aliases {
serial0 = &uart0;
};
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm 0 50000 0>;
power-supply = <&reg_dcdc1>;
brightness-levels = <0 5 7 10 14 20 28 40 56 80 112>;
default-brightness-level = <5>;
enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
};
chosen {
stdout-path = "serial0:115200n8";
framebuffer-lcd {
eDP25-supply = <&reg_dldo2>;
eDP12-supply = <&reg_dldo3>;
};
};
gpio-keys {
compatible = "gpio-keys";
lid-switch {
label = "Lid Switch";
gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>; /* PL8 */
linux,input-type = <EV_SW>;
linux,code = <SW_LID>;
wakeup-source;
};
};
leds {
compatible = "gpio-leds";
capslock {
label = "teres-i:green:capslock";
gpios = <&pio 2 7 GPIO_ACTIVE_HIGH>; /* PC7 */
};
numlock {
label = "teres-i:green:numlock";
gpios = <&pio 2 4 GPIO_ACTIVE_HIGH>; /* PC4 */
};
};
reg_usb1_vbus: usb1-vbus {
compatible = "regulator-fixed";
regulator-name = "usb1-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
status = "okay";
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
};
speaker_amp: audio-amplifier {
compatible = "simple-audio-amplifier";
enable-gpios = <&r_pio 0 12 GPIO_ACTIVE_HIGH>; /* PL12 */
sound-name-prefix = "Speaker Amp";
};
};
&codec {
status = "okay";
};
&codec_analog {
cpvdd-supply = <&reg_eldo1>;
status = "okay";
};
&dai {
status = "okay";
};
&de {
status = "okay";
};
&cpu0 {
cpu-supply = <&reg_dcdc2>;
};
&cpu1 {
cpu-supply = <&reg_dcdc2>;
};
&cpu2 {
cpu-supply = <&reg_dcdc2>;
};
&cpu3 {
cpu-supply = <&reg_dcdc2>;
};
&ehci1 {
status = "okay";
};
&i2c0 {
clock-frequency = <100000>;
status = "okay";
anx6345: anx6345@38 {
compatible = "analogix,anx6345";
reg = <0x38>;
reset-gpios = <&pio 3 24 GPIO_ACTIVE_LOW>; /* PD24 */
dvdd25-supply = <&reg_dldo2>;
dvdd12-supply = <&reg_dldo3>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
anx6345_in: endpoint {
remote-endpoint = <&tcon0_out_anx6345>;
};
};
};
};
};
&mixer0 {
status = "okay";
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
vmmc-supply = <&reg_dcdc1>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
disable-wp;
bus-width = <4>;
status = "okay";
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
vmmc-supply = <&reg_aldo2>;
vqmmc-supply = <&reg_dldo4>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
rtl8723bs: wifi@1 {
reg = <1>;
interrupt-parent = <&r_pio>;
interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */
interrupt-names = "host-wake";
};
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
vmmc-supply = <&reg_dcdc1>;
vqmmc-supply = <&reg_dcdc1>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
status = "okay";
};
&ohci1 {
status = "okay";
};
&pwm {
status = "okay";
};
&r_rsb {
status = "okay";
axp803: pmic@3a3 {
compatible = "x-powers,axp803";
reg = <0x3a3>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
wakeup-source;
};
};
#include "axp803.dtsi"
&ac_power_supply {
status = "okay";
};
&battery_power_supply {
status = "okay";
};
&reg_aldo1 {
regulator-always-on;
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "vcc-pe";
};
&reg_aldo2 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-pl";
};
&reg_aldo3 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vcc-pll-avcc";
};
&reg_dcdc1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-3v3";
};
&reg_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1040000>;
regulator-max-microvolt = <1300000>;
regulator-name = "vdd-cpux";
};
/* DCDC3 is polyphased with DCDC2 */
&reg_dcdc5 {
regulator-always-on;
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-name = "vcc-ddr3";
};
&reg_dcdc6 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-sys";
};
&reg_dldo1 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-hdmi";
};
&reg_dldo2 {
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
regulator-name = "vcc-pd";
};
&reg_dldo3 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vdd-edp";
};
&reg_dldo4 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi-io";
};
&reg_eldo1 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "cpvdd";
};
&reg_eldo2 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-dvdd-csi";
};
&reg_fldo1 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vcc-1v2-hsic";
};
/*
* The A64 chip cannot work with this regulator off, although
* it seems to be only driving the AR100 core.
* Maybe we don't still know well about CPUs domain.
*/
&reg_fldo2 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpus";
};
&reg_rtc_ldo {
regulator-name = "vcc-rtc";
};
&simplefb_hdmi {
vcc-hdmi-supply = <&reg_dldo1>;
};
&sound {
simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>;
simple-audio-card,widgets = "Headphone", "Headphone Jack",
"Microphone", "Headset Microphone",
"Microphone", "Internal Microphone",
"Speaker", "Internal Speaker";
simple-audio-card,routing =
"Left DAC", "DACL",
"Right DAC", "DACR",
"ADCL", "Left ADC",
"ADCR", "Right ADC",
"Headphone Jack", "HP",
"Speaker Amp INL", "LINEOUT",
"Speaker Amp INR", "LINEOUT",
"Internal Speaker", "Speaker Amp OUTL",
"Internal Speaker", "Speaker Amp OUTR",
"Internal Microphone", "MBIAS",
"MIC1", "Internal Microphone",
"Headset Microphone", "HBIAS",
"MIC2", "Headset Microphone";
status = "okay";
};
&tcon0 {
pinctrl-names = "default";
pinctrl-0 = <&lcd_rgb666_pins>;
status = "okay";
};
&tcon0_out {
tcon0_out_anx6345: endpoint@0 {
reg = <0>;
remote-endpoint = <&anx6345_in>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
&usbphy {
usb1_vbus-supply = <&reg_usb1_vbus>;
status = "okay";
};

1319
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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12
arch/arm64/boot/dts/allwinner/sun50i-h5-bananapi-m2-plus-v1.2.dts
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@ -1,12 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
/dts-v1/;
#include "sun50i-h5.dtsi"
#include "sun50i-h5-cpu-opp.dtsi"
#include <arm/sunxi-bananapi-m2-plus-v1.2.dtsi>
/ {
model = "Banana Pi BPI-M2-Plus v1.2 H5";
compatible = "bananapi,bpi-m2-plus-v1.2", "allwinner,sun50i-h5";
};

11
arch/arm64/boot/dts/allwinner/sun50i-h5-bananapi-m2-plus.dts
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@ -1,11 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
/dts-v1/;
#include "sun50i-h5.dtsi"
#include <arm/sunxi-bananapi-m2-plus.dtsi>
/ {
model = "Banana Pi BPI-M2-Plus H5";
compatible = "sinovoip,bpi-m2-plus", "allwinner,sun50i-h5";
};

79
arch/arm64/boot/dts/allwinner/sun50i-h5-cpu-opp.dtsi
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2020 Chen-Yu Tsai <wens@csie.org>
/ {
cpu_opp_table: opp-table-cpu {
compatible = "operating-points-v2";
opp-shared;
opp-408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <1000000 1000000 1310000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp-648000000 {
opp-hz = /bits/ 64 <648000000>;
opp-microvolt = <1040000 1040000 1310000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp-816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <1080000 1080000 1310000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp-912000000 {
opp-hz = /bits/ 64 <912000000>;
opp-microvolt = <1120000 1120000 1310000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp-960000000 {
opp-hz = /bits/ 64 <960000000>;
opp-microvolt = <1160000 1160000 1310000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp-1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <1200000 1200000 1310000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp-1056000000 {
opp-hz = /bits/ 64 <1056000000>;
opp-microvolt = <1240000 1240000 1310000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp-1104000000 {
opp-hz = /bits/ 64 <1104000000>;
opp-microvolt = <1260000 1260000 1310000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp-1152000000 {
opp-hz = /bits/ 64 <1152000000>;
opp-microvolt = <1300000 1300000 1310000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
};
};
&cpu0 {
operating-points-v2 = <&cpu_opp_table>;
};
&cpu1 {
operating-points-v2 = <&cpu_opp_table>;
};
&cpu2 {
operating-points-v2 = <&cpu_opp_table>;
};
&cpu3 {
operating-points-v2 = <&cpu_opp_table>;
};

71
arch/arm64/boot/dts/allwinner/sun50i-h5-emlid-neutis-n5-devboard.dts
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
// Copyright (C) 2018 Aleksandr Aleksandrov <aleksandr.aleksandrov@emlid.com>
/*
* DTS for Emlid Neutis N5 Dev board.
*/
/dts-v1/;
#include "sun50i-h5-emlid-neutis-n5.dtsi"
/ {
model = "Emlid Neutis N5 Developer board";
compatible = "emlid,neutis-n5-devboard",
"emlid,neutis-n5",
"allwinner,sun50i-h5";
connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
vdd_cpux: gpio-regulator {
compatible = "regulator-gpio";
regulator-name = "vdd-cpux";
regulator-type = "voltage";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1300000>;
regulator-ramp-delay = <50>; /* 4ms */
gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
gpios-states = <0x1>;
states = <1100000 0>, <1300000 1>;
};
};
&cpu0 {
cpu-supply = <&vdd_cpux>;
};
&codec {
status = "okay";
};
&emac {
phy-handle = <&int_mii_phy>;
phy-mode = "mii";
allwinner,leds-active-low;
status = "okay";
};
&hdmi {
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&i2c1 {
status = "okay";
};

11
arch/arm64/boot/dts/allwinner/sun50i-h5-emlid-neutis-n5.dtsi
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
// Copyright (C) 2018 Aleksandr Aleksandrov <aleksandr.aleksandrov@emlid.com>
/*
* DTSI for Emlid Neutis N5 SoM.
*/
/dts-v1/;
#include "sun50i-h5.dtsi"
#include <arm/sunxi-h3-h5-emlid-neutis.dtsi>

17
arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2018 BayLibre, SAS
// Author: Neil Armstrong <narmstrong@baylibre.com>
/dts-v1/;
#include "sun50i-h5.dtsi"
#include "sun50i-h5-cpu-opp.dtsi"
#include <arm/sunxi-libretech-all-h3-cc.dtsi>
/ {
model = "Libre Computer Board ALL-H3-CC H5";
compatible = "libretech,all-h3-cc-h5", "allwinner,sun50i-h5";
};
&mmc2 {
mmc-ddr-3_3v;
};

11
arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-it.dts
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@ -1,11 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2019 Chen-Yu Tsai <wens@csie.org>
/dts-v1/;
#include "sun50i-h5.dtsi"
#include <arm/sunxi-libretech-all-h3-it.dtsi>
/ {
model = "Libre Computer Board ALL-H3-IT H5";
compatible = "libretech,all-h3-it-h5", "allwinner,sun50i-h5";
};

61
arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h5-cc.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2020 Chen-Yu Tsai <wens@csie.org>
#include "sun50i-h5-libretech-all-h3-cc.dts"
/ {
model = "Libre Computer Board ALL-H5-CC H5";
compatible = "libretech,all-h5-cc-h5", "allwinner,sun50i-h5";
aliases {
spi0 = &spi0;
};
reg_gmac_3v3: gmac-3v3 {
compatible = "regulator-fixed";
regulator-name = "gmac-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <5000>;
enable-active-high;
gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
vin-supply = <&reg_vcc5v0>;
};
};
&codec {
/* No line out; only onboard microphone */
allwinner,audio-routing =
"MIC1", "Mic",
"Mic", "MBIAS";
};
/* This board has external PHY */
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <&reg_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii-id";
/delete-property/ allwinner,leds-active-low;
status = "okay";
};
&external_mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
&spi0 {
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
};
};

163
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
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@ -1,163 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2017 Antony Antony <antony@phenome.org>
// Copyright (C) 2016 ARM Ltd.
/dts-v1/;
#include "sun50i-h5.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "FriendlyARM NanoPi NEO Plus2";
compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";
aliases {
ethernet0 = &emac;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
pwr {
label = "nanopi:green:pwr";
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
status {
label = "nanopi:red:status";
gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
};
};
reg_gmac_3v3: gmac-3v3 {
compatible = "regulator-fixed";
regulator-name = "gmac-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <100000>;
enable-active-high;
gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
};
reg_vcc3v3: vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vdd_cpux: gpio-regulator {
compatible = "regulator-gpio";
regulator-name = "vdd-cpux";
regulator-type = "voltage";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1300000>;
regulator-ramp-delay = <50>; /* 4ms */
gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
gpios-states = <0x1>;
states = <1100000 0>, <1300000 1>;
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
post-power-on-delay-ms = <200>;
};
};
&codec {
allwinner,audio-routing =
"Line Out", "LINEOUT",
"MIC1", "Mic",
"Mic", "MBIAS";
status = "okay";
};
&ehci0 {
status = "okay";
};
&ehci3 {
status = "okay";
};
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <&reg_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii-id";
status = "okay";
};
&external_mdio {
ext_rgmii_phy: ethernet-phy@7 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <7>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
status = "okay";
};
&mmc1 {
vmmc-supply = <&reg_vcc3v3>;
vqmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
};
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_8bit_pins>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
status = "okay";
};
&ohci0 {
status = "okay";
};
&ohci3 {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};
&usb_otg {
dr_mode = "host";
status = "okay";
};
&usbphy {
/* USB Type-A ports' VBUS is always on */
status = "okay";
};

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arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
/dts-v1/;
#include "sun50i-h5.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "FriendlyARM NanoPi NEO 2";
compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5";
aliases {
ethernet0 = &emac;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
pwr {
label = "nanopi:green:pwr";
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
status {
label = "nanopi:blue:status";
gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
};
};
reg_gmac_3v3: gmac-3v3 {
compatible = "regulator-fixed";
regulator-name = "gmac-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <100000>;
enable-active-high;
gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
};
reg_vcc3v3: vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reg_usb0_vbus: usb0-vbus {
compatible = "regulator-fixed";
regulator-name = "usb0-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
status = "okay";
};
};
&ehci0 {
status = "okay";
};
&ehci3 {
status = "okay";
};
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <&reg_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii-id";
status = "okay";
};
&external_mdio {
ext_rgmii_phy: ethernet-phy@7 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <7>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
status = "okay";
};
&ohci0 {
status = "okay";
};
&ohci3 {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};
&usb_otg {
dr_mode = "otg";
status = "okay";
};
&usbphy {
/* USB Type-A port's VBUS is always on */
usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
usb0_vbus-supply = <&reg_usb0_vbus>;
status = "okay";
};

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arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2016 ARM Ltd.
/dts-v1/;
#include "sun50i-h5.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Xunlong Orange Pi PC 2";
compatible = "xunlong,orangepi-pc2", "allwinner,sun50i-h5";
reg_vcc3v3: vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
aliases {
ethernet0 = &emac;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
leds {
compatible = "gpio-leds";
pwr {
label = "orangepi:green:pwr";
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
status {
label = "orangepi:red:status";
gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
};
};
r-gpio-keys {
compatible = "gpio-keys";
sw4 {
label = "sw4";
linux,code = <BTN_0>;
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
wakeup-source;
};
};
reg_gmac_3v3: gmac-3v3 {
compatible = "regulator-fixed";
regulator-name = "gmac-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <100000>;
enable-active-high;
gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
};
reg_usb0_vbus: usb0-vbus {
compatible = "regulator-fixed";
regulator-name = "usb0-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
status = "okay";
};
};
&codec {
allwinner,audio-routing =
"Line Out", "LINEOUT",
"MIC1", "Mic",
"Mic", "MBIAS";
status = "okay";
};
&cpu0 {
cpu-supply = <&reg_vdd_cpux>;
};
&de {
status = "okay";
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
&ehci2 {
status = "okay";
};
&ehci3 {
status = "okay";
};
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <&reg_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii-id";
status = "okay";
};
&external_mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
&hdmi {
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&ir {
pinctrl-names = "default";
pinctrl-0 = <&r_ir_rx_pin>;
status = "okay";
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
status = "okay";
};
&ohci0 {
status = "okay";
};
&ohci1 {
status = "okay";
};
&ohci2 {
status = "okay";
};
&ohci3 {
status = "okay";
};
&r_i2c {
status = "okay";
reg_vdd_cpux: regulator@65 {
compatible = "silergy,sy8106a";
reg = <0x65>;
regulator-name = "vdd-cpux";
silergy,fixed-microvolt = <1100000>;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1400000>;
regulator-ramp-delay = <200>;
regulator-boot-on;
regulator-always-on;
};
};
&spi0 {
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <40000000>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
status = "disabled";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "disabled";
};
&usb_otg {
dr_mode = "otg";
status = "okay";
};
&usbphy {
/* USB Type-A ports' VBUS is always on */
usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
usb0_vbus-supply = <&reg_usb0_vbus>;
status = "okay";
};

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arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.xyz>
// Based on sun50i-h5-orangepi-pc2.dts, which is:
// Copyright (C) 2016 ARM Ltd.
/dts-v1/;
#include "sun50i-h5.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "Xunlong Orange Pi Prime";
compatible = "xunlong,orangepi-prime", "allwinner,sun50i-h5";
aliases {
ethernet0 = &emac;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
leds {
compatible = "gpio-leds";
pwr {
label = "orangepi:green:pwr";
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
status {
label = "orangepi:red:status";
gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
};
};
r-gpio-keys {
compatible = "gpio-keys";
sw4 {
label = "sw4";
linux,code = <BTN_0>;
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
};
};
reg_gmac_3v3: gmac-3v3 {
compatible = "regulator-fixed";
regulator-name = "gmac-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <100000>;
enable-active-high;
gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
};
reg_vcc3v3: vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reg_usb0_vbus: usb0-vbus {
compatible = "regulator-fixed";
regulator-name = "usb0-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
status = "okay";
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 2 14 GPIO_ACTIVE_LOW>; /* PC14 */
};
};
&codec {
allwinner,audio-routing =
"Line Out", "LINEOUT",
"MIC1", "Mic",
"Mic", "MBIAS";
status = "okay";
};
&de {
status = "okay";
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
&ehci2 {
status = "okay";
};
&ehci3 {
status = "okay";
};
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <&reg_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii-id";
status = "okay";
};
&external_mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
&hdmi {
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&ir {
pinctrl-names = "default";
pinctrl-0 = <&r_ir_rx_pin>;
status = "okay";
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
status = "okay";
};
&mmc1 {
vmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
};
&ohci0 {
status = "okay";
};
&ohci1 {
status = "okay";
};
&ohci2 {
status = "okay";
};
&ohci3 {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
status = "disabled";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "disabled";
};
&usb_otg {
dr_mode = "otg";
status = "okay";
};
&usbphy {
/* USB Type-A ports' VBUS is always on */
usb0_id_det-gpios = <&pio 0 21 GPIO_ACTIVE_HIGH>; /* PA21 */
usb0_vbus-supply = <&reg_usb0_vbus>;
status = "okay";
};

140
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2016 ARM Ltd.
// Copyright (C) 2018 Hauke Mehrtens <hauke@hauke-m.de>
/dts-v1/;
#include "sun50i-h5.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Xunlong Orange Pi Zero Plus";
compatible = "xunlong,orangepi-zero-plus", "allwinner,sun50i-h5";
reg_vcc3v3: vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
aliases {
ethernet0 = &emac;
ethernet1 = &rtl8189ftv;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
pwr {
label = "orangepi:green:pwr";
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
default-state = "on";
};
status {
label = "orangepi:red:status";
gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */
};
};
reg_gmac_3v3: gmac-3v3 {
compatible = "regulator-fixed";
regulator-name = "gmac-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <100000>;
enable-active-high;
gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
};
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <&reg_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii-id";
status = "okay";
};
&external_mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
status = "okay";
};
&mmc1 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
non-removable;
status = "okay";
/*
* Explicitly define the sdio device, so that we can add an ethernet
* alias for it (which e.g. makes u-boot set a mac-address).
*/
rtl8189ftv: sdio_wifi@1 {
reg = <1>;
};
};
&spi0 {
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "mxicy,mx25l1606e", "winbond,w25q128";
reg = <0>;
spi-max-frequency = <40000000>;
};
};
&ohci0 {
status = "okay";
};
&ohci1 {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};
&usb_otg {
dr_mode = "peripheral";
status = "okay";
};
&usbphy {
/* USB Type-A ports' VBUS is always on */
usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
status = "okay";
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
/dts-v1/;
#include "sun50i-h5.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "OrangePi Zero Plus2";
compatible = "xunlong,orangepi-zero-plus2", "allwinner,sun50i-h5";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
leds {
compatible = "gpio-leds";
pwr {
label = "orangepi:green:pwr";
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
status {
label = "orangepi:red:status";
gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>;
};
};
reg_vcc3v3: vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */
post-power-on-delay-ms = <200>;
};
};
&de {
status = "okay";
};
&ehci0 {
status = "okay";
};
&hdmi {
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
status = "okay";
};
&mmc1 {
vmmc-supply = <&reg_vcc3v3>;
vqmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&r_pio>;
interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */
interrupt-names = "host-wake";
};
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_8bit_pins>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
status = "okay";
};
&ohci0 {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
status = "okay";
};
&usb_otg {
/*
* According to schematics CN1 MicroUSB port can be used to take
* external 5V to power up the board VBUS. On the contrary CN1 MicroUSB
* port cannot provide power externally even if the board is powered
* via GPIO pins. It thus makes sense to force peripheral mode.
*/
dr_mode = "peripheral";
status = "okay";
};
&usbphy {
status = "okay";
};

257
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2016 ARM Ltd.
#include <arm/sunxi-h3-h5.dtsi>
#include <dt-bindings/thermal/thermal.h>
/ {
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <0>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
clock-latency-ns = <244144>; /* 8 32k periods */
#cooling-cells = <2>;
};
cpu1: cpu@1 {
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <1>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
clock-latency-ns = <244144>; /* 8 32k periods */
#cooling-cells = <2>;
};
cpu2: cpu@2 {
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <2>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
clock-latency-ns = <244144>; /* 8 32k periods */
#cooling-cells = <2>;
};
cpu3: cpu@3 {
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <3>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
clock-latency-ns = <244144>; /* 8 32k periods */
#cooling-cells = <2>;
};
};
pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
timer {
compatible = "arm,armv8-timer";
arm,no-tick-in-suspend;
interrupts = <GIC_PPI 13
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
soc {
syscon: system-control@1c00000 {
compatible = "allwinner,sun50i-h5-system-control";
reg = <0x01c00000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
sram_c1: sram@18000 {
compatible = "mmio-sram";
reg = <0x00018000 0x1c000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x00018000 0x1c000>;
ve_sram: sram-section@0 {
compatible = "allwinner,sun50i-h5-sram-c1",
"allwinner,sun4i-a10-sram-c1";
reg = <0x000000 0x1c000>;
};
};
};
video-codec@1c0e000 {
compatible = "allwinner,sun50i-h5-video-engine";
reg = <0x01c0e000 0x1000>;
clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
<&ccu CLK_DRAM_VE>;
clock-names = "ahb", "mod", "ram";
resets = <&ccu RST_BUS_VE>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
allwinner,sram = <&ve_sram 1>;
};
crypto: crypto@1c15000 {
compatible = "allwinner,sun50i-h5-crypto";
reg = <0x01c15000 0x1000>;
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
clock-names = "bus", "mod";
resets = <&ccu RST_BUS_CE>;
};
mali: gpu@1e80000 {
compatible = "allwinner,sun50i-h5-mali", "arm,mali-450";
reg = <0x01e80000 0x30000>;
/*
* While the datasheet lists an interrupt for the
* PMU, the actual silicon does not have the PMU
* block. Reads all return zero, and writes are
* ignored.
*/
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "gp",
"gpmmu",
"pp",
"pp0",
"ppmmu0",
"pp1",
"ppmmu1",
"pp2",
"ppmmu2",
"pp3",
"ppmmu3";
clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
clock-names = "bus", "core";
resets = <&ccu RST_BUS_GPU>;
assigned-clocks = <&ccu CLK_GPU>;
assigned-clock-rates = <384000000>;
};
ths: thermal-sensor@1c25000 {
compatible = "allwinner,sun50i-h5-ths";
reg = <0x01c25000 0x400>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
resets = <&ccu RST_BUS_THS>;
clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
clock-names = "bus", "mod";
nvmem-cells = <&ths_calibration>;
nvmem-cell-names = "calibration";
#thermal-sensor-cells = <1>;
};
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 0>;
trips {
cpu_hot_trip: cpu-hot {
temperature = <80000>;
hysteresis = <2000>;
type = "passive";
};
cpu_very_hot_trip: cpu-very-hot {
temperature = <100000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
cpu-hot-limit {
trip = <&cpu_hot_trip>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
gpu-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 1>;
};
};
};
&ccu {
compatible = "allwinner,sun50i-h5-ccu";
};
&display_clocks {
compatible = "allwinner,sun50i-h5-de2-clk";
};
&mmc0 {
compatible = "allwinner,sun50i-h5-mmc",
"allwinner,sun50i-a64-mmc";
clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
clock-names = "ahb", "mmc";
};
&mmc1 {
compatible = "allwinner,sun50i-h5-mmc",
"allwinner,sun50i-a64-mmc";
clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
clock-names = "ahb", "mmc";
};
&mmc2 {
compatible = "allwinner,sun50i-h5-emmc",
"allwinner,sun50i-a64-emmc";
clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
clock-names = "ahb", "mmc";
};
&pio {
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
compatible = "allwinner,sun50i-h5-pinctrl";
};
&rtc {
compatible = "allwinner,sun50i-h5-rtc";
};
&sid {
compatible = "allwinner,sun50i-h5-sid";
};

314
arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
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@ -1,314 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2019 Clément Péron <peron.clem@gmail.com>
/dts-v1/;
#include "sun50i-h6.dtsi"
#include "sun50i-h6-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Beelink GS1";
compatible = "azw,beelink-gs1", "allwinner,sun50i-h6";
aliases {
ethernet0 = &emac;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
connector {
compatible = "hdmi-connector";
type = "a";
ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
ext_osc32k: ext_osc32k_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
clock-output-names = "ext_osc32k";
};
leds {
compatible = "gpio-leds";
power {
label = "beelink:white:power";
gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
default-state = "on";
};
};
reg_vcc5v: vcc5v {
/* board wide 5V supply directly from the DC jack */
compatible = "regulator-fixed";
regulator-name = "vcc-5v";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
sound-spdif {
compatible = "simple-audio-card";
simple-audio-card,name = "sun50i-h6-spdif";
simple-audio-card,cpu {
sound-dai = <&spdif>;
};
simple-audio-card,codec {
sound-dai = <&spdif_out>;
};
};
spdif_out: spdif-out {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dit";
};
};
&cpu0 {
cpu-supply = <&reg_dcdca>;
};
&de {
status = "okay";
};
&dwc3 {
status = "okay";
};
&ehci0 {
status = "okay";
};
&emac {
pinctrl-names = "default";
pinctrl-0 = <&ext_rgmii_pins>;
phy-mode = "rgmii-id";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <&reg_aldo2>;
status = "okay";
};
&gpu {
mali-supply = <&reg_dcdcc>;
status = "okay";
};
&hdmi {
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
&mmc0 {
vmmc-supply = <&reg_cldo1>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
bus-width = <4>;
status = "okay";
};
&mmc2 {
vmmc-supply = <&reg_cldo1>;
vqmmc-supply = <&reg_bldo2>;
non-removable;
cap-mmc-hw-reset;
bus-width = <8>;
status = "okay";
};
&ohci0 {
status = "okay";
};
&pio {
vcc-pd-supply = <&reg_cldo1>;
vcc-pg-supply = <&reg_aldo1>;
};
&r_i2c {
status = "okay";
axp805: pmic@36 {
compatible = "x-powers,axp805", "x-powers,axp806";
reg = <0x36>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <1>;
x-powers,self-working-mode;
vina-supply = <&reg_vcc5v>;
vinb-supply = <&reg_vcc5v>;
vinc-supply = <&reg_vcc5v>;
vind-supply = <&reg_vcc5v>;
vine-supply = <&reg_vcc5v>;
aldoin-supply = <&reg_vcc5v>;
bldoin-supply = <&reg_vcc5v>;
cldoin-supply = <&reg_vcc5v>;
regulators {
reg_aldo1: aldo1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-pl";
};
reg_aldo2: aldo2 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-ac200";
regulator-enable-ramp-delay = <100000>;
};
reg_aldo3: aldo3 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc25-dram";
};
reg_bldo1: bldo1 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-bias-pll";
};
reg_bldo2: bldo2 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-efuse-pcie-hdmi-io";
};
reg_bldo3: bldo3 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-dcxoio";
};
bldo4 {
/* unused */
};
reg_cldo1: cldo1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-3v3";
};
reg_cldo2: cldo2 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi-1";
};
reg_cldo3: cldo3 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi-2";
};
reg_dcdca: dcdca {
regulator-always-on;
regulator-min-microvolt = <810000>;
regulator-max-microvolt = <1160000>;
regulator-ramp-delay = <2500>;
regulator-name = "vdd-cpu";
};
reg_dcdcc: dcdcc {
regulator-enable-ramp-delay = <32000>;
regulator-min-microvolt = <810000>;
regulator-max-microvolt = <1080000>;
regulator-ramp-delay = <2500>;
regulator-name = "vdd-gpu";
};
reg_dcdcd: dcdcd {
regulator-always-on;
regulator-min-microvolt = <960000>;
regulator-max-microvolt = <960000>;
regulator-name = "vdd-sys";
};
reg_dcdce: dcdce {
regulator-always-on;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vcc-dram";
};
sw {
/* unused */
};
};
};
};
&r_ir {
linux,rc-map-name = "rc-beelink-gs1";
status = "okay";
};
&r_pio {
/*
* PL0 and PL1 are used for PMIC I2C
* don't enable the pl-supply else
* it will fail at boot
*
* vcc-pl-supply = <&reg_aldo1>;
*/
vcc-pm-supply = <&reg_aldo1>;
};
&spdif {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_ph_pins>;
status = "okay";
};
&usb2otg {
dr_mode = "host";
status = "okay";
};
&usb2phy {
usb0_vbus-supply = <&reg_vcc5v>;
status = "okay";
};
&usb3phy {
status = "okay";
};

117
arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi
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@ -1,117 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2020 Ondrej Jirman <megous@megous.com>
// Copyright (C) 2020 Clément Péron <peron.clem@gmail.com>
/ {
cpu_opp_table: opp-table-cpu {
compatible = "allwinner,sun50i-h6-operating-points";
nvmem-cells = <&cpu_speed_grade>;
opp-shared;
opp@480000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <480000000>;
opp-microvolt-speed0 = <880000 880000 1200000>;
opp-microvolt-speed1 = <820000 820000 1200000>;
opp-microvolt-speed2 = <820000 820000 1200000>;
};
opp@720000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <720000000>;
opp-microvolt-speed0 = <880000 880000 1200000>;
opp-microvolt-speed1 = <820000 820000 1200000>;
opp-microvolt-speed2 = <820000 820000 1200000>;
};
opp@816000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <816000000>;
opp-microvolt-speed0 = <880000 880000 1200000>;
opp-microvolt-speed1 = <820000 820000 1200000>;
opp-microvolt-speed2 = <820000 820000 1200000>;
};
opp@888000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <888000000>;
opp-microvolt-speed0 = <880000 880000 1200000>;
opp-microvolt-speed1 = <820000 820000 1200000>;
opp-microvolt-speed2 = <820000 820000 1200000>;
};
opp@1080000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <1080000000>;
opp-microvolt-speed0 = <940000 940000 1200000>;
opp-microvolt-speed1 = <880000 880000 1200000>;
opp-microvolt-speed2 = <880000 880000 1200000>;
};
opp@1320000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <1320000000>;
opp-microvolt-speed0 = <1000000 1000000 1200000>;
opp-microvolt-speed1 = <940000 940000 1200000>;
opp-microvolt-speed2 = <940000 940000 1200000>;
};
opp@1488000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <1488000000>;
opp-microvolt-speed0 = <1060000 1060000 1200000>;
opp-microvolt-speed1 = <1000000 1000000 1200000>;
opp-microvolt-speed2 = <1000000 1000000 1200000>;
};
opp@1608000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt-speed0 = <1090000 1090000 1200000>;
opp-microvolt-speed1 = <1030000 1030000 1200000>;
opp-microvolt-speed2 = <1030000 1030000 1200000>;
};
opp@1704000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <1704000000>;
opp-microvolt-speed0 = <1120000 1120000 1200000>;
opp-microvolt-speed1 = <1060000 1060000 1200000>;
opp-microvolt-speed2 = <1060000 1060000 1200000>;
};
opp@1800000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt-speed0 = <1160000 1160000 1200000>;
opp-microvolt-speed1 = <1100000 1100000 1200000>;
opp-microvolt-speed2 = <1100000 1100000 1200000>;
};
};
};
&cpu0 {
operating-points-v2 = <&cpu_opp_table>;
};
&cpu1 {
operating-points-v2 = <&cpu_opp_table>;
};
&cpu2 {
operating-points-v2 = <&cpu_opp_table>;
};
&cpu3 {
operating-points-v2 = <&cpu_opp_table>;
};

345
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
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@ -1,345 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2019 Ondřej Jirman <megous@megous.com>
/dts-v1/;
#include "sun50i-h6.dtsi"
#include "sun50i-h6-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "OrangePi 3";
compatible = "xunlong,orangepi-3", "allwinner,sun50i-h6";
aliases {
serial0 = &uart0;
serial1 = &uart1;
};
chosen {
stdout-path = "serial0:115200n8";
};
connector {
compatible = "hdmi-connector";
ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
ext_osc32k: ext_osc32k_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
clock-output-names = "ext_osc32k";
};
leds {
compatible = "gpio-leds";
power {
label = "orangepi:red:power";
gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
default-state = "on";
};
status {
label = "orangepi:green:status";
gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
};
};
reg_vcc5v: vcc5v {
/* board wide 5V supply directly from the DC jack */
compatible = "regulator-fixed";
regulator-name = "vcc-5v";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
reg_vcc33_wifi: vcc33-wifi {
/* Always on 3.3V regulator for WiFi and BT */
compatible = "regulator-fixed";
regulator-name = "vcc33-wifi";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
vin-supply = <&reg_vcc5v>;
};
reg_vcc_wifi_io: vcc-wifi-io {
/* Always on 1.8V/300mA regulator for WiFi and BT IO */
compatible = "regulator-fixed";
regulator-name = "vcc-wifi-io";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
vin-supply = <&reg_vcc33_wifi>;
};
wifi_pwrseq: wifi-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rtc 1>;
clock-names = "ext_clock";
reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
post-power-on-delay-ms = <200>;
};
};
&cpu0 {
cpu-supply = <&reg_dcdca>;
};
&de {
status = "okay";
};
&dwc3 {
status = "okay";
};
&ehci0 {
status = "okay";
};
&ehci3 {
status = "okay";
};
&gpu {
mali-supply = <&reg_dcdcc>;
status = "okay";
};
&hdmi {
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&mmc0 {
vmmc-supply = <&reg_cldo1>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
bus-width = <4>;
status = "okay";
};
&mmc1 {
vmmc-supply = <&reg_vcc33_wifi>;
vqmmc-supply = <&reg_vcc_wifi_io>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
brcm: sdio-wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&r_pio>;
interrupts = <1 0 IRQ_TYPE_LEVEL_LOW>; /* PM0 */
interrupt-names = "host-wake";
};
};
&mmc2 {
vmmc-supply = <&reg_cldo1>;
vqmmc-supply = <&reg_bldo2>;
cap-mmc-hw-reset;
non-removable;
bus-width = <8>;
status = "okay";
};
&ohci0 {
status = "okay";
};
&ohci3 {
status = "okay";
};
&pio {
vcc-pc-supply = <&reg_bldo2>;
vcc-pd-supply = <&reg_cldo1>;
vcc-pg-supply = <&reg_vcc_wifi_io>;
};
&r_i2c {
status = "okay";
axp805: pmic@36 {
compatible = "x-powers,axp805", "x-powers,axp806";
reg = <0x36>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <1>;
x-powers,self-working-mode;
vina-supply = <&reg_vcc5v>;
vinb-supply = <&reg_vcc5v>;
vinc-supply = <&reg_vcc5v>;
vind-supply = <&reg_vcc5v>;
vine-supply = <&reg_vcc5v>;
aldoin-supply = <&reg_vcc5v>;
bldoin-supply = <&reg_vcc5v>;
cldoin-supply = <&reg_vcc5v>;
regulators {
reg_aldo1: aldo1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-pl-led-ir";
};
reg_aldo2: aldo2 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc33-audio-tv-ephy-mac";
};
/* ALDO3 is shorted to CLDO1 */
reg_aldo3: aldo3 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-1";
};
reg_bldo1: bldo1 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc18-dram-bias-pll";
};
reg_bldo2: bldo2 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-efuse-pcie-hdmi-pc";
};
bldo3 {
/* unused */
};
bldo4 {
/* unused */
};
reg_cldo1: cldo1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-2";
};
cldo2 {
/* unused */
};
cldo3 {
/* unused */
};
reg_dcdca: dcdca {
regulator-always-on;
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1160000>;
regulator-ramp-delay = <2500>;
regulator-name = "vdd-cpu";
};
reg_dcdcc: dcdcc {
regulator-enable-ramp-delay = <32000>;
regulator-min-microvolt = <810000>;
regulator-max-microvolt = <1080000>;
regulator-ramp-delay = <2500>;
regulator-name = "vdd-gpu";
};
reg_dcdcd: dcdcd {
regulator-always-on;
regulator-min-microvolt = <960000>;
regulator-max-microvolt = <960000>;
regulator-name = "vdd-sys";
};
reg_dcdce: dcdce {
regulator-always-on;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vcc-dram";
};
sw {
/* unused */
};
};
};
};
&r_ir {
status = "okay";
};
&rtc {
clocks = <&ext_osc32k>;
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_ph_pins>;
status = "okay";
};
/* There's the BT part of the AP6256 connected to that UART */
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
uart-has-rtscts;
status = "okay";
bluetooth {
compatible = "brcm,bcm4345c5";
clocks = <&rtc 1>;
clock-names = "lpo";
device-wakeup-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */
host-wakeup-gpios = <&r_pio 1 1 GPIO_ACTIVE_HIGH>; /* PM1 */
shutdown-gpios = <&r_pio 1 4 GPIO_ACTIVE_HIGH>; /* PM4 */
max-speed = <1500000>;
};
};
&usb2otg {
/*
* This board doesn't have a controllable VBUS even though it
* does have an ID pin. Using it as anything but a USB host is
* unsafe.
*/
dr_mode = "host";
status = "okay";
};
&usb2phy {
usb0_id_det-gpios = <&pio 2 15 GPIO_ACTIVE_HIGH>; /* PC15 */
usb0_vbus-supply = <&reg_vcc5v>;
usb3_vbus-supply = <&reg_vcc5v>;
status = "okay";
};
&usb3phy {
status = "okay";
};

74
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts
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@ -1,74 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2018 Jagan Teki <jagan@openedev.com>
#include "sun50i-h6-orangepi.dtsi"
/ {
model = "OrangePi Lite2";
compatible = "xunlong,orangepi-lite2", "allwinner,sun50i-h6";
aliases {
serial1 = &uart1; /* BT-UART */
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rtc 1>;
clock-names = "ext_clock";
reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
post-power-on-delay-ms = <200>;
};
};
&mmc1 {
vmmc-supply = <&reg_cldo2>;
vqmmc-supply = <&reg_bldo3>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
brcm: sdio-wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&r_pio>;
interrupts = <1 0 IRQ_TYPE_LEVEL_LOW>; /* PM0 */
interrupt-names = "host-wake";
};
};
&reg_cldo2 {
/*
* This regulator is connected with CLDO3.
* Before the kernel can support synchronized
* enable of coupled regulators, keep them
* both always on as a ugly hack.
*/
regulator-always-on;
};
&reg_cldo3 {
/*
* This regulator is connected with CLDO2.
* See the comments for CLDO2.
*/
regulator-always-on;
};
/* There's the BT part of the AP6255 connected to that UART */
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
uart-has-rtscts;
status = "okay";
bluetooth {
compatible = "brcm,bcm4345c5";
clocks = <&rtc 1>;
clock-names = "lpo";
device-wakeup-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */
host-wakeup-gpios = <&r_pio 1 1 GPIO_ACTIVE_HIGH>; /* PM1 */
shutdown-gpios = <&r_pio 1 4 GPIO_ACTIVE_HIGH>; /* PM4 */
max-speed = <1500000>;
};
};

43
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts
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@ -1,43 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2018 Amarula Solutions
// Author: Jagan Teki <jagan@amarulasolutions.com>
#include "sun50i-h6-orangepi.dtsi"
/ {
model = "OrangePi One Plus";
compatible = "xunlong,orangepi-one-plus", "allwinner,sun50i-h6";
aliases {
ethernet0 = &emac;
};
reg_gmac_3v3: gmac-3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc-gmac-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <100000>;
enable-active-high;
gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
vin-supply = <&reg_aldo2>;
};
};
&emac {
pinctrl-names = "default";
pinctrl-0 = <&ext_rgmii_pins>;
phy-mode = "rgmii-id";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <&reg_gmac_3v3>;
allwinner,rx-delay-ps = <200>;
allwinner,tx-delay-ps = <200>;
status = "okay";
};
&mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};

268
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
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@ -1,268 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2018 Amarula Solutions
// Author: Jagan Teki <jagan@amarulasolutions.com>
/dts-v1/;
#include "sun50i-h6.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "OrangePi One Plus";
compatible = "xunlong,orangepi-one-plus", "allwinner,sun50i-h6";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
connector {
compatible = "hdmi-connector";
type = "a";
ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
ext_osc32k: ext_osc32k_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
clock-output-names = "ext_osc32k";
};
leds {
compatible = "gpio-leds";
power {
label = "orangepi:red:power";
gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
default-state = "on";
};
status {
label = "orangepi:green:status";
gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
};
};
reg_vcc5v: vcc5v {
/* board wide 5V supply directly from the DC jack */
compatible = "regulator-fixed";
regulator-name = "vcc-5v";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
};
&de {
status = "okay";
};
&ehci0 {
status = "okay";
};
&ehci3 {
status = "okay";
};
&gpu {
mali-supply = <&reg_dcdcc>;
status = "okay";
};
&hdmi {
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&mmc0 {
vmmc-supply = <&reg_cldo1>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
bus-width = <4>;
status = "okay";
};
&ohci0 {
status = "okay";
};
&ohci3 {
status = "okay";
};
&pio {
vcc-pc-supply = <&reg_bldo2>;
vcc-pd-supply = <&reg_cldo1>;
vcc-pg-supply = <&reg_aldo1>;
};
&r_i2c {
status = "okay";
axp805: pmic@36 {
compatible = "x-powers,axp805", "x-powers,axp806";
reg = <0x36>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <1>;
x-powers,self-working-mode;
vina-supply = <&reg_vcc5v>;
vinb-supply = <&reg_vcc5v>;
vinc-supply = <&reg_vcc5v>;
vind-supply = <&reg_vcc5v>;
vine-supply = <&reg_vcc5v>;
aldoin-supply = <&reg_vcc5v>;
bldoin-supply = <&reg_vcc5v>;
cldoin-supply = <&reg_vcc5v>;
regulators {
reg_aldo1: aldo1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-pl";
};
reg_aldo2: aldo2 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-ac200";
};
reg_aldo3: aldo3 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc25-dram";
};
reg_bldo1: bldo1 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-bias-pll";
};
reg_bldo2: bldo2 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-efuse-pcie-hdmi-io";
};
reg_bldo3: bldo3 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-dcxoio";
};
bldo4 {
/* unused */
};
reg_cldo1: cldo1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-3v3";
};
reg_cldo2: cldo2 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi-1";
};
reg_cldo3: cldo3 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi-2";
};
reg_dcdca: dcdca {
regulator-always-on;
regulator-min-microvolt = <810000>;
regulator-max-microvolt = <1080000>;
regulator-name = "vdd-cpu";
};
reg_dcdcc: dcdcc {
regulator-enable-ramp-delay = <32000>;
regulator-min-microvolt = <810000>;
regulator-max-microvolt = <1080000>;
regulator-name = "vdd-gpu";
};
reg_dcdcd: dcdcd {
regulator-always-on;
regulator-min-microvolt = <960000>;
regulator-max-microvolt = <960000>;
regulator-name = "vdd-sys";
};
reg_dcdce: dcdce {
regulator-always-on;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vcc-dram";
};
sw {
/* unused */
};
};
};
};
&r_ir {
status = "okay";
};
&r_pio {
vcc-pm-supply = <&reg_bldo3>;
};
&rtc {
clocks = <&ext_osc32k>;
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_ph_pins>;
status = "okay";
};
&usb2otg {
/*
* OrangePi Lite 2 and One Plus, where this DT is used, don't
* have a controllable VBUS even though they do have an ID pin.
* Using it as anything but a USB host is unsafe.
*/
dr_mode = "host";
status = "okay";
};
&usb2phy {
usb0_id_det-gpios = <&pio 2 6 GPIO_ACTIVE_HIGH>; /* PC6 */
usb0_vbus-supply = <&reg_vcc5v>;
usb3_vbus-supply = <&reg_vcc5v>;
status = "okay";
};

21
arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64-model-b.dts
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@ -1,21 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
/*
* Copyright (C) 2019 Corentin LABBE <clabbe@baylibre.com>
*/
#include "sun50i-h6-pine-h64.dts"
/ {
model = "Pine H64 model B";
compatible = "pine64,pine-h64-model-b", "allwinner,sun50i-h6";
/delete-node/ reg_gmac_3v3;
};
&hdmi_connector {
/delete-property/ ddc-en-gpios;
};
&emac {
phy-supply = <&reg_aldo2>;
};

333
arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
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@ -1,333 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (c) 2017 Icenowy Zheng <icenowy@aosc.io>
/dts-v1/;
#include "sun50i-h6.dtsi"
#include "sun50i-h6-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Pine H64 model A";
compatible = "pine64,pine-h64", "allwinner,sun50i-h6";
aliases {
ethernet0 = &emac;
serial0 = &uart0;
spi0 = &spi0;
};
chosen {
stdout-path = "serial0:115200n8";
};
ext_osc32k: ext_osc32k_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
clock-output-names = "ext_osc32k";
};
hdmi_connector: connector {
compatible = "hdmi-connector";
type = "a";
ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
leds {
compatible = "gpio-leds";
heartbeat {
label = "pine-h64:green:heartbeat";
gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
};
link {
label = "pine-h64:white:link";
gpios = <&r_pio 0 3 GPIO_ACTIVE_HIGH>; /* PL3 */
};
status {
label = "pine-h64:blue:status";
gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
};
};
reg_gmac_3v3: gmac-3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc-gmac-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <100000>;
gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_usb_vbus: vbus {
compatible = "regulator-fixed";
regulator-name = "usb-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
startup-delay-us = <100000>;
gpio = <&r_pio 0 5 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&cpu0 {
cpu-supply = <&reg_dcdca>;
};
&de {
status = "okay";
};
&ehci0 {
status = "okay";
};
&ehci3 {
status = "okay";
};
&emac {
pinctrl-names = "default";
pinctrl-0 = <&ext_rgmii_pins>;
phy-mode = "rgmii-id";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <&reg_gmac_3v3>;
allwinner,rx-delay-ps = <200>;
allwinner,tx-delay-ps = <200>;
status = "okay";
};
&gpu {
mali-supply = <&reg_dcdcc>;
status = "okay";
};
&hdmi {
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
&mmc0 {
vmmc-supply = <&reg_cldo1>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
bus-width = <4>;
status = "okay";
};
&mmc2 {
vmmc-supply = <&reg_cldo1>;
vqmmc-supply = <&reg_bldo2>;
non-removable;
cap-mmc-hw-reset;
bus-width = <8>;
status = "okay";
};
&ohci0 {
status = "okay";
};
&ohci3 {
status = "okay";
};
&pio {
vcc-pc-supply = <&reg_bldo2>;
vcc-pd-supply = <&reg_cldo1>;
vcc-pg-supply = <&reg_aldo1>;
};
&r_i2c {
status = "okay";
axp805: pmic@36 {
compatible = "x-powers,axp805", "x-powers,axp806";
reg = <0x36>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <1>;
x-powers,self-working-mode;
regulators {
reg_aldo1: aldo1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-pl";
};
reg_aldo2: aldo2 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-ac200";
regulator-enable-ramp-delay = <100000>;
};
reg_aldo3: aldo3 {
/* This regulator is connected with CLDO1 */
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-3v3-1";
};
reg_bldo1: bldo1 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-bias-pll";
};
reg_bldo2: bldo2 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-efuse-pcie-hdmi-io";
};
reg_bldo3: bldo3 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-dcxoio";
};
bldo4 {
/* unused */
};
reg_cldo1: cldo1 {
/* This regulator is connected with ALDO3 */
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-3v3-2";
};
reg_cldo2: cldo2 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi-1";
};
reg_cldo3: cldo3 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi-2";
};
reg_dcdca: dcdca {
regulator-always-on;
regulator-min-microvolt = <810000>;
regulator-max-microvolt = <1160000>;
regulator-ramp-delay = <2500>;
regulator-name = "vdd-cpu";
};
reg_dcdcc: dcdcc {
regulator-enable-ramp-delay = <32000>;
regulator-min-microvolt = <810000>;
regulator-max-microvolt = <1080000>;
regulator-ramp-delay = <2500>;
regulator-name = "vdd-gpu";
};
reg_dcdcd: dcdcd {
regulator-always-on;
regulator-min-microvolt = <960000>;
regulator-max-microvolt = <960000>;
regulator-name = "vdd-sys";
};
reg_dcdce: dcdce {
regulator-always-on;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vcc-dram";
};
sw {
/* unused */
};
};
};
pcf8563: rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
#clock-cells = <0>;
};
};
&r_ir {
status = "okay";
};
&r_pio {
vcc-pm-supply = <&reg_aldo1>;
};
&rtc {
clocks = <&ext_osc32k>;
};
/*
* The CS pin is shared with the MMC2 CMD pin, so we cannot have the SPI
* flash and eMMC at the same time, as one of them would fail probing.
* Disable SPI0 in here, to prefer the more useful eMMC. U-Boot can
* fix this up in no eMMC is connected.
*/
&spi0 {
pinctrl-0 = <&spi0_pins>, <&spi0_cs_pin>;
pinctrl-names = "default";
status = "disabled";
flash@0 {
compatible = "winbond,w25q128", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <4000000>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_ph_pins>;
status = "okay";
};
&usb2otg {
dr_mode = "host";
status = "okay";
};
&usb2phy {
usb0_vbus-supply = <&reg_usb_vbus>;
usb3_vbus-supply = <&reg_usb_vbus>;
status = "okay";
};

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arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (c) 2019 Jernej Skrabec <jernej.skrabec@siol.net>
/dts-v1/;
#include "sun50i-h6.dtsi"
#include "sun50i-h6-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Tanix TX6";
compatible = "oranth,tanix-tx6", "allwinner,sun50i-h6";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
connector {
compatible = "hdmi-connector";
ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
reg_vcc3v3: regulator-vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reg_vdd_cpu_gpu: regulator-vdd-cpu-gpu {
compatible = "regulator-fixed";
regulator-name = "vdd-cpu-gpu";
regulator-min-microvolt = <1135000>;
regulator-max-microvolt = <1135000>;
};
};
&cpu0 {
cpu-supply = <&reg_vdd_cpu_gpu>;
};
&de {
status = "okay";
};
&dwc3 {
status = "okay";
};
&ehci0 {
status = "okay";
};
&ehci3 {
status = "okay";
};
&gpu {
mali-supply = <&reg_vdd_cpu_gpu>;
status = "okay";
};
&hdmi {
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
vmmc-supply = <&reg_vcc3v3>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
bus-width = <4>;
status = "okay";
};
&ohci0 {
status = "okay";
};
&ohci3 {
status = "okay";
};
&r_ir {
linux,rc-map-name = "rc-tanix-tx5max";
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_ph_pins>;
status = "okay";
};
&usb2otg {
dr_mode = "host";
status = "okay";
};
&usb2phy {
status = "okay";
};
&usb3phy {
status = "okay";
};

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arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
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3
arch/arm64/boot/dts/altera/Makefile
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# SPDX-License-Identifier: GPL-2.0-only
dtb-$(CONFIG_ARCH_STRATIX10) += socfpga_stratix10_socdk.dtb \
socfpga_stratix10_socdk_nand.dtb

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arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
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// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright Altera Corporation (C) 2015. All rights reserved.
*/
/dts-v1/;
#include <dt-bindings/reset/altr,rst-mgr-s10.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/stratix10-clock.h>
/ {
compatible = "altr,socfpga-stratix10";
#address-cells = <2>;
#size-cells = <2>;
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
service_reserved: svcbuffer@0 {
compatible = "shared-dma-pool";
reg = <0x0 0x0 0x0 0x1000000>;
alignment = <0x1000>;
no-map;
};
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "psci";
reg = <0x0>;
};
cpu1: cpu@1 {
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "psci";
reg = <0x1>;
};
cpu2: cpu@2 {
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "psci";
reg = <0x2>;
};
cpu3: cpu@3 {
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "psci";
reg = <0x3>;
};
};
pmu {
compatible = "arm,armv8-pmuv3";
interrupts = <0 170 4>,
<0 171 4>,
<0 172 4>,
<0 173 4>;
interrupt-affinity = <&cpu0>,
<&cpu1>,
<&cpu2>,
<&cpu3>;
interrupt-parent = <&intc>;
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
intc: interrupt-controller@fffc1000 {
compatible = "arm,gic-400", "arm,cortex-a15-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x0 0xfffc1000 0x0 0x1000>,
<0x0 0xfffc2000 0x0 0x2000>,
<0x0 0xfffc4000 0x0 0x2000>,
<0x0 0xfffc6000 0x0 0x2000>;
};
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
device_type = "soc";
interrupt-parent = <&intc>;
ranges = <0 0 0 0xffffffff>;
base_fpga_region {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "fpga-region";
fpga-mgr = <&fpga_mgr>;
};
clkmgr: clock-controller@ffd10000 {
compatible = "intel,stratix10-clkmgr";
reg = <0xffd10000 0x1000>;
#clock-cells = <1>;
};
clocks {
cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
};
cb_intosc_ls_clk: cb-intosc-ls-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
};
f2s_free_clk: f2s-free-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
};
osc1: osc1 {
#clock-cells = <0>;
compatible = "fixed-clock";
};
qspi_clk: qspi-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <200000000>;
};
};
gmac0: ethernet@ff800000 {
compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
reg = <0xff800000 0x2000>;
interrupts = <0 90 4>;
interrupt-names = "macirq";
mac-address = [00 00 00 00 00 00];
resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;
reset-names = "stmmaceth", "stmmaceth-ocp";
clocks = <&clkmgr STRATIX10_EMAC0_CLK>, <&clkmgr STRATIX10_EMAC_PTP_CLK>;
clock-names = "stmmaceth", "ptp_ref";
tx-fifo-depth = <16384>;
rx-fifo-depth = <16384>;
snps,multicast-filter-bins = <256>;
iommus = <&smmu 1>;
altr,sysmgr-syscon = <&sysmgr 0x44 0>;
status = "disabled";
};
gmac1: ethernet@ff802000 {
compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
reg = <0xff802000 0x2000>;
interrupts = <0 91 4>;
interrupt-names = "macirq";
mac-address = [00 00 00 00 00 00];
resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
reset-names = "stmmaceth", "stmmaceth-ocp";
clocks = <&clkmgr STRATIX10_EMAC1_CLK>, <&clkmgr STRATIX10_EMAC_PTP_CLK>;
clock-names = "stmmaceth", "ptp_ref";
tx-fifo-depth = <16384>;
rx-fifo-depth = <16384>;
snps,multicast-filter-bins = <256>;
iommus = <&smmu 2>;
altr,sysmgr-syscon = <&sysmgr 0x48 8>;
status = "disabled";
};
gmac2: ethernet@ff804000 {
compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
reg = <0xff804000 0x2000>;
interrupts = <0 92 4>;
interrupt-names = "macirq";
mac-address = [00 00 00 00 00 00];
resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;
reset-names = "stmmaceth", "stmmaceth-ocp";
clocks = <&clkmgr STRATIX10_EMAC2_CLK>, <&clkmgr STRATIX10_EMAC_PTP_CLK>;
clock-names = "stmmaceth", "ptp_ref";
tx-fifo-depth = <16384>;
rx-fifo-depth = <16384>;
snps,multicast-filter-bins = <256>;
iommus = <&smmu 3>;
altr,sysmgr-syscon = <&sysmgr 0x4c 16>;
status = "disabled";
};
gpio0: gpio@ffc03200 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dw-apb-gpio";
reg = <0xffc03200 0x100>;
resets = <&rst GPIO0_RESET>;
status = "disabled";
porta: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
snps,nr-gpios = <24>;
reg = <0>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <0 110 4>;
};
};
gpio1: gpio@ffc03300 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dw-apb-gpio";
reg = <0xffc03300 0x100>;
resets = <&rst GPIO1_RESET>;
status = "disabled";
portb: gpio-controller@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
snps,nr-gpios = <24>;
reg = <0>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <0 111 4>;
};
};
i2c0: i2c@ffc02800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,designware-i2c";
reg = <0xffc02800 0x100>;
interrupts = <0 103 4>;
resets = <&rst I2C0_RESET>;
clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
status = "disabled";
};
i2c1: i2c@ffc02900 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,designware-i2c";
reg = <0xffc02900 0x100>;
interrupts = <0 104 4>;
resets = <&rst I2C1_RESET>;
clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
status = "disabled";
};
i2c2: i2c@ffc02a00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,designware-i2c";
reg = <0xffc02a00 0x100>;
interrupts = <0 105 4>;
resets = <&rst I2C2_RESET>;
clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
status = "disabled";
};
i2c3: i2c@ffc02b00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,designware-i2c";
reg = <0xffc02b00 0x100>;
interrupts = <0 106 4>;
resets = <&rst I2C3_RESET>;
clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
status = "disabled";
};
i2c4: i2c@ffc02c00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,designware-i2c";
reg = <0xffc02c00 0x100>;
interrupts = <0 107 4>;
resets = <&rst I2C4_RESET>;
clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
status = "disabled";
};
mmc: dwmmc0@ff808000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "altr,socfpga-dw-mshc";
reg = <0xff808000 0x1000>;
interrupts = <0 96 4>;
fifo-depth = <0x400>;
resets = <&rst SDMMC_RESET>;
reset-names = "reset";
clocks = <&clkmgr STRATIX10_L4_MP_CLK>,
<&clkmgr STRATIX10_SDMMC_CLK>;
clock-names = "biu", "ciu";
iommus = <&smmu 5>;
status = "disabled";
};
nand: nand-controller@ffb90000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "altr,socfpga-denali-nand";
reg = <0xffb90000 0x10000>,
<0xffb80000 0x1000>;
reg-names = "nand_data", "denali_reg";
interrupts = <0 97 4>;
clocks = <&clkmgr STRATIX10_NAND_CLK>,
<&clkmgr STRATIX10_NAND_X_CLK>,
<&clkmgr STRATIX10_NAND_ECC_CLK>;
clock-names = "nand", "nand_x", "ecc";
resets = <&rst NAND_RESET>, <&rst NAND_OCP_RESET>;
status = "disabled";
};
ocram: sram@ffe00000 {
compatible = "mmio-sram";
reg = <0xffe00000 0x100000>;
};
pdma: pdma@ffda0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0xffda0000 0x1000>;
interrupts = <0 81 4>,
<0 82 4>,
<0 83 4>,
<0 84 4>,
<0 85 4>,
<0 86 4>,
<0 87 4>,
<0 88 4>,
<0 89 4>;
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
clocks = <&clkmgr STRATIX10_L4_MAIN_CLK>;
clock-names = "apb_pclk";
resets = <&rst DMA_RESET>, <&rst DMA_OCP_RESET>;
reset-names = "dma", "dma-ocp";
};
rst: rstmgr@ffd11000 {
#reset-cells = <1>;
compatible = "altr,stratix10-rst-mgr";
reg = <0xffd11000 0x1000>;
};
smmu: iommu@fa000000 {
compatible = "arm,mmu-500", "arm,smmu-v2";
reg = <0xfa000000 0x40000>;
#global-interrupts = <2>;
#iommu-cells = <1>;
clocks = <&clkmgr STRATIX10_L4_MAIN_CLK>;
clock-names = "iommu";
interrupt-parent = <&intc>;
interrupts = <0 128 4>, /* Global Secure Fault */
<0 129 4>, /* Global Non-secure Fault */
/* Non-secure Context Interrupts (32) */
<0 138 4>, <0 139 4>, <0 140 4>, <0 141 4>,
<0 142 4>, <0 143 4>, <0 144 4>, <0 145 4>,
<0 146 4>, <0 147 4>, <0 148 4>, <0 149 4>,
<0 150 4>, <0 151 4>, <0 152 4>, <0 153 4>,
<0 154 4>, <0 155 4>, <0 156 4>, <0 157 4>,
<0 158 4>, <0 159 4>, <0 160 4>, <0 161 4>,
<0 162 4>, <0 163 4>, <0 164 4>, <0 165 4>,
<0 166 4>, <0 167 4>, <0 168 4>, <0 169 4>;
stream-match-mask = <0x7ff0>;
status = "disabled";
};
spi0: spi@ffda4000 {
compatible = "snps,dw-apb-ssi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xffda4000 0x1000>;
interrupts = <0 99 4>;
resets = <&rst SPIM0_RESET>;
reset-names = "spi";
reg-io-width = <4>;
num-cs = <4>;
clocks = <&clkmgr STRATIX10_L4_MAIN_CLK>;
status = "disabled";
};
spi1: spi@ffda5000 {
compatible = "snps,dw-apb-ssi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xffda5000 0x1000>;
interrupts = <0 100 4>;
resets = <&rst SPIM1_RESET>;
reset-names = "spi";
reg-io-width = <4>;
num-cs = <4>;
clocks = <&clkmgr STRATIX10_L4_MAIN_CLK>;
status = "disabled";
};
sysmgr: sysmgr@ffd12000 {
compatible = "altr,sys-mgr-s10","altr,sys-mgr";
reg = <0xffd12000 0x228>;
};
/* Local timer */
timer {
compatible = "arm,armv8-timer";
interrupts = <1 13 0xf08>,
<1 14 0xf08>,
<1 11 0xf08>,
<1 10 0xf08>;
};
timer0: timer0@ffc03000 {
compatible = "snps,dw-apb-timer";
interrupts = <0 113 4>;
reg = <0xffc03000 0x100>;
clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
clock-names = "timer";
};
timer1: timer1@ffc03100 {
compatible = "snps,dw-apb-timer";
interrupts = <0 114 4>;
reg = <0xffc03100 0x100>;
clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
clock-names = "timer";
};
timer2: timer2@ffd00000 {
compatible = "snps,dw-apb-timer";
interrupts = <0 115 4>;
reg = <0xffd00000 0x100>;
clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
clock-names = "timer";
};
timer3: timer3@ffd00100 {
compatible = "snps,dw-apb-timer";
interrupts = <0 116 4>;
reg = <0xffd00100 0x100>;
clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
clock-names = "timer";
};
uart0: serial@ffc02000 {
compatible = "snps,dw-apb-uart";
reg = <0xffc02000 0x100>;
interrupts = <0 108 4>;
reg-shift = <2>;
reg-io-width = <4>;
resets = <&rst UART0_RESET>;
clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
status = "disabled";
};
uart1: serial@ffc02100 {
compatible = "snps,dw-apb-uart";
reg = <0xffc02100 0x100>;
interrupts = <0 109 4>;
reg-shift = <2>;
reg-io-width = <4>;
resets = <&rst UART1_RESET>;
clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
status = "disabled";
};
usbphy0: usbphy@0 {
#phy-cells = <0>;
compatible = "usb-nop-xceiv";
status = "okay";
};
usb0: usb@ffb00000 {
compatible = "snps,dwc2";
reg = <0xffb00000 0x40000>;
interrupts = <0 93 4>;
phys = <&usbphy0>;
phy-names = "usb2-phy";
resets = <&rst USB0_RESET>, <&rst USB0_OCP_RESET>;
reset-names = "dwc2", "dwc2-ecc";
clocks = <&clkmgr STRATIX10_USB_CLK>;
iommus = <&smmu 6>;
status = "disabled";
};
usb1: usb@ffb40000 {
compatible = "snps,dwc2";
reg = <0xffb40000 0x40000>;
interrupts = <0 94 4>;
phys = <&usbphy0>;
phy-names = "usb2-phy";
resets = <&rst USB1_RESET>, <&rst USB1_OCP_RESET>;
reset-names = "dwc2", "dwc2-ecc";
clocks = <&clkmgr STRATIX10_USB_CLK>;
iommus = <&smmu 7>;
status = "disabled";
};
watchdog0: watchdog@ffd00200 {
compatible = "snps,dw-wdt";
reg = <0xffd00200 0x100>;
interrupts = <0 117 4>;
resets = <&rst WATCHDOG0_RESET>;
clocks = <&clkmgr STRATIX10_L4_SYS_FREE_CLK>;
status = "disabled";
};
watchdog1: watchdog@ffd00300 {
compatible = "snps,dw-wdt";
reg = <0xffd00300 0x100>;
interrupts = <0 118 4>;
resets = <&rst WATCHDOG1_RESET>;
clocks = <&clkmgr STRATIX10_L4_SYS_FREE_CLK>;
status = "disabled";
};
watchdog2: watchdog@ffd00400 {
compatible = "snps,dw-wdt";
reg = <0xffd00400 0x100>;
interrupts = <0 125 4>;
resets = <&rst WATCHDOG2_RESET>;
clocks = <&clkmgr STRATIX10_L4_SYS_FREE_CLK>;
status = "disabled";
};
watchdog3: watchdog@ffd00500 {
compatible = "snps,dw-wdt";
reg = <0xffd00500 0x100>;
interrupts = <0 126 4>;
resets = <&rst WATCHDOG3_RESET>;
clocks = <&clkmgr STRATIX10_L4_SYS_FREE_CLK>;
status = "disabled";
};
sdr: sdr@f8011100 {
compatible = "altr,sdr-ctl", "syscon";
reg = <0xf8011100 0xc0>;
};
eccmgr {
compatible = "altr,socfpga-s10-ecc-manager",
"altr,socfpga-a10-ecc-manager";
altr,sysmgr-syscon = <&sysmgr>;
#address-cells = <1>;
#size-cells = <1>;
interrupts = <0 15 4>;
interrupt-controller;
#interrupt-cells = <2>;
ranges;
sdramedac {
compatible = "altr,sdram-edac-s10";
altr,sdr-syscon = <&sdr>;
interrupts = <16 4>;
};
ocram-ecc@ff8cc000 {
compatible = "altr,socfpga-s10-ocram-ecc",
"altr,socfpga-a10-ocram-ecc";
reg = <0xff8cc000 0x100>;
altr,ecc-parent = <&ocram>;
interrupts = <1 4>;
};
usb0-ecc@ff8c4000 {
compatible = "altr,socfpga-s10-usb-ecc",
"altr,socfpga-usb-ecc";
reg = <0xff8c4000 0x100>;
altr,ecc-parent = <&usb0>;
interrupts = <2 4>;
};
emac0-rx-ecc@ff8c0000 {
compatible = "altr,socfpga-s10-eth-mac-ecc",
"altr,socfpga-eth-mac-ecc";
reg = <0xff8c0000 0x100>;
altr,ecc-parent = <&gmac0>;
interrupts = <4 4>;
};
emac0-tx-ecc@ff8c0400 {
compatible = "altr,socfpga-s10-eth-mac-ecc",
"altr,socfpga-eth-mac-ecc";
reg = <0xff8c0400 0x100>;
altr,ecc-parent = <&gmac0>;
interrupts = <5 4>;
};
};
qspi: spi@ff8d2000 {
compatible = "cdns,qspi-nor";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xff8d2000 0x100>,
<0xff900000 0x100000>;
interrupts = <0 3 4>;
cdns,fifo-depth = <128>;
cdns,fifo-width = <4>;
cdns,trigger-address = <0x00000000>;
clocks = <&qspi_clk>;
status = "disabled";
};
firmware {
svc {
compatible = "intel,stratix10-svc";
method = "smc";
memory-region = <&service_reserved>;
fpga_mgr: fpga-mgr {
compatible = "intel,stratix10-soc-fpga-mgr";
};
};
};
};
};

191
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
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@ -1,191 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright Altera Corporation (C) 2015. All rights reserved.
*/
#include "socfpga_stratix10.dtsi"
/ {
model = "SoCFPGA Stratix 10 SoCDK";
aliases {
serial0 = &uart0;
ethernet0 = &gmac0;
ethernet1 = &gmac1;
ethernet2 = &gmac2;
};
chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
hps0 {
label = "hps_led0";
gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
};
hps1 {
label = "hps_led1";
gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
};
hps2 {
label = "hps_led2";
gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
};
};
memory {
device_type = "memory";
/* We expect the bootloader to fill in the reg */
reg = <0 0 0 0>;
};
ref_033v: 033-v-ref {
compatible = "regulator-fixed";
regulator-name = "0.33V";
regulator-min-microvolt = <330000>;
regulator-max-microvolt = <330000>;
};
soc {
clocks {
osc1 {
clock-frequency = <25000000>;
};
};
eccmgr {
sdmmca-ecc@ff8c8c00 {
compatible = "altr,socfpga-s10-sdmmc-ecc",
"altr,socfpga-sdmmc-ecc";
reg = <0xff8c8c00 0x100>;
altr,ecc-parent = <&mmc>;
interrupts = <14 4>,
<15 4>;
};
};
};
};
&gpio1 {
status = "okay";
};
&gmac0 {
status = "okay";
phy-mode = "rgmii";
phy-handle = <&phy0>;
max-frame-size = <9000>;
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy0: ethernet-phy@0 {
reg = <4>;
txd0-skew-ps = <0>; /* -420ps */
txd1-skew-ps = <0>; /* -420ps */
txd2-skew-ps = <0>; /* -420ps */
txd3-skew-ps = <0>; /* -420ps */
rxd0-skew-ps = <420>; /* 0ps */
rxd1-skew-ps = <420>; /* 0ps */
rxd2-skew-ps = <420>; /* 0ps */
rxd3-skew-ps = <420>; /* 0ps */
txen-skew-ps = <0>; /* -420ps */
txc-skew-ps = <900>; /* 0ps */
rxdv-skew-ps = <420>; /* 0ps */
rxc-skew-ps = <1680>; /* 780ps */
};
};
};
&mmc {
status = "okay";
cap-sd-highspeed;
cap-mmc-highspeed;
broken-cd;
bus-width = <4>;
};
&uart0 {
status = "okay";
};
&usb0 {
status = "okay";
disable-over-current;
};
&watchdog0 {
status = "okay";
};
&i2c1 {
status = "okay";
clock-frequency = <100000>;
i2c-sda-falling-time-ns = <890>; /* hcnt */
i2c-sdl-falling-time-ns = <890>; /* lcnt */
adc@14 {
compatible = "lltc,ltc2497";
reg = <0x14>;
vref-supply = <&ref_033v>;
};
temp@4c {
compatible = "maxim,max1619";
reg = <0x4c>;
};
eeprom@51 {
compatible = "atmel,24c32";
reg = <0x51>;
pagesize = <32>;
};
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
};
};
&qspi {
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,mt25qu02g", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <100000000>;
m25p,fast-read;
cdns,page-size = <256>;
cdns,block-size = <16>;
cdns,read-delay = <1>;
cdns,tshsl-ns = <50>;
cdns,tsd2d-ns = <50>;
cdns,tchsh-ns = <4>;
cdns,tslch-ns = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
qspi_boot: partition@0 {
label = "Boot and fpga data";
reg = <0x0 0x03FE0000>;
};
qspi_rootfs: partition@3FE0000 {
label = "Root Filesystem - JFFS2";
reg = <0x03FE0000 0x0C020000>;
};
};
};
};

224
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts
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@ -1,224 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright Altera Corporation (C) 2015. All rights reserved.
*/
#include "socfpga_stratix10.dtsi"
/ {
model = "SoCFPGA Stratix 10 SoCDK";
aliases {
serial0 = &uart0;
ethernet0 = &gmac0;
ethernet1 = &gmac1;
ethernet2 = &gmac2;
};
chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
hps0 {
label = "hps_led0";
gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
};
hps1 {
label = "hps_led1";
gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
};
hps2 {
label = "hps_led2";
gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
};
};
memory {
device_type = "memory";
/* We expect the bootloader to fill in the reg */
reg = <0 0 0 0>;
};
ref_033v: 033-v-ref {
compatible = "regulator-fixed";
regulator-name = "0.33V";
regulator-min-microvolt = <330000>;
regulator-max-microvolt = <330000>;
};
soc {
clocks {
osc1 {
clock-frequency = <25000000>;
};
};
eccmgr {
sdmmca-ecc@ff8c8c00 {
compatible = "altr,socfpga-s10-sdmmc-ecc",
"altr,socfpga-sdmmc-ecc";
reg = <0xff8c8c00 0x100>;
altr,ecc-parent = <&mmc>;
interrupts = <14 4>,
<15 4>;
};
};
};
};
&gpio1 {
status = "okay";
};
&gmac2 {
status = "okay";
phy-mode = "rgmii";
phy-handle = <&phy0>;
max-frame-size = <9000>;
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy0: ethernet-phy@0 {
reg = <4>;
txd0-skew-ps = <0>; /* -420ps */
txd1-skew-ps = <0>; /* -420ps */
txd2-skew-ps = <0>; /* -420ps */
txd3-skew-ps = <0>; /* -420ps */
rxd0-skew-ps = <420>; /* 0ps */
rxd1-skew-ps = <420>; /* 0ps */
rxd2-skew-ps = <420>; /* 0ps */
rxd3-skew-ps = <420>; /* 0ps */
txen-skew-ps = <0>; /* -420ps */
txc-skew-ps = <900>; /* 0ps */
rxdv-skew-ps = <420>; /* 0ps */
rxc-skew-ps = <1680>; /* 780ps */
};
};
};
&nand {
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
nand-bus-width = <16>;
partition@0 {
label = "u-boot";
reg = <0 0x200000>;
};
partition@200000 {
label = "env";
reg = <0x200000 0x40000>;
};
partition@240000 {
label = "dtb";
reg = <0x240000 0x40000>;
};
partition@280000 {
label = "kernel";
reg = <0x280000 0x2000000>;
};
partition@2280000 {
label = "misc";
reg = <0x2280000 0x2000000>;
};
partition@4280000 {
label = "rootfs";
reg = <0x4280000 0x3bd80000>;
};
};
};
&uart0 {
status = "okay";
};
&usb0 {
status = "okay";
disable-over-current;
};
&watchdog0 {
status = "okay";
};
&i2c2 {
status = "okay";
clock-frequency = <100000>;
i2c-sda-falling-time-ns = <890>; /* hcnt */
i2c-sdl-falling-time-ns = <890>; /* lcnt */
adc@14 {
compatible = "lltc,ltc2497";
reg = <0x14>;
vref-supply = <&ref_033v>;
};
temp@4c {
compatible = "maxim,max1619";
reg = <0x4c>;
};
eeprom@51 {
compatible = "atmel,24c32";
reg = <0x51>;
pagesize = <32>;
};
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
};
};
&qspi {
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,mt25qu02g", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <100000000>;
m25p,fast-read;
cdns,page-size = <256>;
cdns,block-size = <16>;
cdns,read-delay = <1>;
cdns,tshsl-ns = <50>;
cdns,tsd2d-ns = <50>;
cdns,tchsh-ns = <4>;
cdns,tslch-ns = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
qspi_boot: partition@0 {
label = "Boot and fpga data";
reg = <0x0 0x03FE0000>;
};
qspi_rootfs: partition@3FE0000 {
label = "Root Filesystem - JFFS2";
reg = <0x03FE0000 0x0C020000>;
};
};
};
};

3
arch/arm64/boot/dts/amazon/Makefile
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@ -1,3 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-only
dtb-$(CONFIG_ARCH_ALPINE) += alpine-v2-evp.dtb
dtb-$(CONFIG_ARCH_ALPINE) += alpine-v3-evp.dtb

53
arch/arm64/boot/dts/amazon/alpine-v2-evp.dts
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@ -1,53 +0,0 @@
/*
* Copyright 2016 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Antoine Tenart <antoine.tenart@free-electrons.com>
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* General Public License (GPL) Version 2, available from the file
* COPYING in the main directory of this source tree, or the
* BSD license below:
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
*
* - Redistributions of source code must retain the above
* copyright notice, this list of conditions and the following
* disclaimer.
*
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#include "alpine-v2.dtsi"
/ {
model = "Annapurna Labs Alpine v2 EVP";
compatible = "al,alpine-v2-evp", "al,alpine-v2";
aliases {
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&uart0 { status = "okay"; };

236
arch/arm64/boot/dts/amazon/alpine-v2.dtsi
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@ -1,236 +0,0 @@
/*
* Copyright 2016 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Antoine Tenart <antoine.tenart@free-electrons.com>
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* General Public License (GPL) Version 2, available from the file
* COPYING in the main directory of this source tree, or the
* BSD license below:
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
*
* - Redistributions of source code must retain the above
* copyright notice, this list of conditions and the following
* disclaimer.
*
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
/dts-v1/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
model = "Annapurna Labs Alpine v2";
compatible = "al,alpine-v2";
#address-cells = <2>;
#size-cells = <2>;
cpus {
#address-cells = <2>;
#size-cells = <0>;
cpu@0 {
compatible = "arm,cortex-a57";
device_type = "cpu";
reg = <0x0 0x0>;
enable-method = "psci";
};
cpu@1 {
compatible = "arm,cortex-a57";
device_type = "cpu";
reg = <0x0 0x1>;
enable-method = "psci";
};
cpu@2 {
compatible = "arm,cortex-a57";
device_type = "cpu";
reg = <0x0 0x2>;
enable-method = "psci";
};
cpu@3 {
compatible = "arm,cortex-a57";
device_type = "cpu";
reg = <0x0 0x3>;
enable-method = "psci";
};
};
psci {
compatible = "arm,psci-0.2", "arm,psci";
method = "smc";
cpu_suspend = <0x84000001>;
cpu_off = <0x84000002>;
cpu_on = <0x84000003>;
};
sbclk: sbclk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <1000000>;
};
soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&gic>;
ranges;
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
};
pmu {
compatible = "arm,armv8-pmuv3";
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
};
gic: interrupt-controller@f0200000 {
compatible = "arm,gic-v3";
reg = <0x0 0xf0200000 0x0 0x10000>, /* GIC Dist */
<0x0 0xf0280000 0x0 0x200000>, /* GICR */
<0x0 0xf0100000 0x0 0x2000>, /* GICC */
<0x0 0xf0110000 0x0 0x2000>, /* GICV */
<0x0 0xf0120000 0x0 0x2000>; /* GICH */
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <3>;
};
pci@fbc00000 {
compatible = "pci-host-ecam-generic";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
#interrupt-cells = <1>;
reg = <0x0 0xfbc00000 0x0 0x100000>;
interrupt-map-mask = <0xf800 0 0 7>;
/* add legacy interrupts for SATA only */
interrupt-map = <0x4000 0 0 1 &gic 0 53 4>,
<0x4800 0 0 1 &gic 0 54 4>;
/* 32 bit non prefetchable memory space */
ranges = <0x2000000 0x0 0xfe000000 0x0 0xfe000000 0x0 0x1000000>;
bus-range = <0x00 0x00>;
msi-parent = <&msix>;
};
msix: msix@fbe00000 {
compatible = "al,alpine-msix";
reg = <0x0 0xfbe00000 0x0 0x100000>;
interrupt-controller;
msi-controller;
al,msi-base-spi = <160>;
al,msi-num-spis = <160>;
};
io-fabric {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0xfc000000 0x2000000>;
uart0: serial@1883000 {
compatible = "ns16550a";
device_type = "serial";
reg = <0x1883000 0x1000>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <500000000>;
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
};
uart1: serial@1884000 {
compatible = "ns16550a";
device_type = "serial";
reg = <0x1884000 0x1000>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <500000000>;
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
};
uart2: serial@1885000 {
compatible = "ns16550a";
device_type = "serial";
reg = <0x1885000 0x1000>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <500000000>;
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
};
uart3: serial@1886000 {
compatible = "ns16550a";
device_type = "serial";
reg = <0x1886000 0x1000>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <500000000>;
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
};
timer0: timer@1890000 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x1890000 0x1000>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sbclk>;
};
timer1: timer@1891000 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x1891000 0x1000>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sbclk>;
status = "disabled";
};
timer2: timer@1892000 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x1892000 0x1000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sbclk>;
status = "disabled";
};
timer3: timer@1893000 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x1893000 0x1000>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sbclk>;
status = "disabled";
};
};
};
};

24
arch/arm64/boot/dts/amazon/alpine-v3-evp.dts
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@ -1,24 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*/
#include "alpine-v3.dtsi"
/ {
model = "Amazon's Annapurna Labs Alpine v3 Evaluation Platform (EVP)";
compatible = "amazon,al-alpine-v3-evp", "amazon,al-alpine-v3";
aliases {
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&uart0 { status = "okay"; };

408
arch/arm64/boot/dts/amazon/alpine-v3.dtsi
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@ -1,408 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2020, Amazon.com, Inc. or its affiliates. All Rights Reserved
*/
/dts-v1/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
model = "Amazon's Annapurna Labs Alpine v3";
compatible = "amazon,al-alpine-v3";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a72";
reg = <0x0>;
enable-method = "psci";
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <256>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
next-level-cache = <&cluster0_l2>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a72";
reg = <0x1>;
enable-method = "psci";
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <256>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
next-level-cache = <&cluster0_l2>;
};
cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a72";
reg = <0x2>;
enable-method = "psci";
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <256>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
next-level-cache = <&cluster0_l2>;
};
cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a72";
reg = <0x3>;
enable-method = "psci";
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <256>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
next-level-cache = <&cluster0_l2>;
};
cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a72";
reg = <0x100>;
enable-method = "psci";
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <256>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
next-level-cache = <&cluster1_l2>;
};
cpu@101 {
device_type = "cpu";
compatible = "arm,cortex-a72";
reg = <0x101>;
enable-method = "psci";
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <256>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
next-level-cache = <&cluster1_l2>;
};
cpu@102 {
device_type = "cpu";
compatible = "arm,cortex-a72";
reg = <0x102>;
enable-method = "psci";
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <256>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
next-level-cache = <&cluster1_l2>;
};
cpu@103 {
device_type = "cpu";
compatible = "arm,cortex-a72";
reg = <0x103>;
enable-method = "psci";
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <256>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
next-level-cache = <&cluster1_l2>;
};
cpu@200 {
device_type = "cpu";
compatible = "arm,cortex-a72";
reg = <0x200>;
enable-method = "psci";
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <256>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
next-level-cache = <&cluster2_l2>;
};
cpu@201 {
device_type = "cpu";
compatible = "arm,cortex-a72";
reg = <0x201>;
enable-method = "psci";
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <256>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
next-level-cache = <&cluster2_l2>;
};
cpu@202 {
device_type = "cpu";
compatible = "arm,cortex-a72";
reg = <0x202>;
enable-method = "psci";
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <256>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
next-level-cache = <&cluster2_l2>;
};
cpu@203 {
device_type = "cpu";
compatible = "arm,cortex-a72";
reg = <0x203>;
enable-method = "psci";
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <256>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
next-level-cache = <&cluster2_l2>;
};
cpu@300 {
device_type = "cpu";
compatible = "arm,cortex-a72";
reg = <0x300>;
enable-method = "psci";
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <256>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
next-level-cache = <&cluster3_l2>;
};
cpu@301 {
device_type = "cpu";
compatible = "arm,cortex-a72";
reg = <0x301>;
enable-method = "psci";
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <256>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
next-level-cache = <&cluster3_l2>;
};
cpu@302 {
device_type = "cpu";
compatible = "arm,cortex-a72";
reg = <0x302>;
enable-method = "psci";
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <256>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
next-level-cache = <&cluster3_l2>;
};
cpu@303 {
device_type = "cpu";
compatible = "arm,cortex-a72";
reg = <0x303>;
enable-method = "psci";
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <256>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
next-level-cache = <&cluster3_l2>;
};
cluster0_l2: cache@0 {
compatible = "cache";
cache-size = <0x200000>;
cache-line-size = <64>;
cache-sets = <2048>;
cache-level = <2>;
};
cluster1_l2: cache@100 {
compatible = "cache";
cache-size = <0x200000>;
cache-line-size = <64>;
cache-sets = <2048>;
cache-level = <2>;
};
cluster2_l2: cache@200 {
compatible = "cache";
cache-size = <0x200000>;
cache-line-size = <64>;
cache-sets = <2048>;
cache-level = <2>;
};
cluster3_l2: cache@300 {
compatible = "cache";
cache-size = <0x200000>;
cache-line-size = <64>;
cache-sets = <2048>;
cache-level = <2>;
};
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
secmon@0 {
reg = <0x0 0x0 0x0 0x100000>;
no-map;
};
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
};
pmu {
compatible = "arm,cortex-a72-pmu";
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
};
soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
gic: interrupt-controller@f0000000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x0 0xf0800000 0 0x10000>, /* GICD */
<0x0 0xf0a00000 0 0x200000>, /* GICR */
<0x0 0xf0000000 0 0x2000>, /* GICC */
<0x0 0xf0010000 0 0x1000>, /* GICH */
<0x0 0xf0020000 0 0x2000>; /* GICV */
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
};
pcie@fbd00000 {
compatible = "pci-host-ecam-generic";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
#interrupt-cells = <1>;
reg = <0x0 0xfbd00000 0x0 0x100000>;
interrupt-map-mask = <0xf800 0 0 7>;
/* 8 x legacy interrupts for SATA only */
interrupt-map = <0x4000 0 0 1 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
<0x4800 0 0 1 &gic 0 58 IRQ_TYPE_LEVEL_HIGH>,
<0x5000 0 0 1 &gic 0 59 IRQ_TYPE_LEVEL_HIGH>,
<0x5800 0 0 1 &gic 0 60 IRQ_TYPE_LEVEL_HIGH>,
<0x6000 0 0 1 &gic 0 61 IRQ_TYPE_LEVEL_HIGH>,
<0x6800 0 0 1 &gic 0 62 IRQ_TYPE_LEVEL_HIGH>,
<0x7000 0 0 1 &gic 0 63 IRQ_TYPE_LEVEL_HIGH>,
<0x7800 0 0 1 &gic 0 64 IRQ_TYPE_LEVEL_HIGH>;
ranges = <0x02000000 0x0 0xfe000000 0x0 0xfe000000 0x0 0x1000000>;
bus-range = <0x00 0x00>;
msi-parent = <&msix>;
};
msix: msix@fbe00000 {
compatible = "al,alpine-msix";
reg = <0x0 0xfbe00000 0x0 0x100000>;
interrupt-controller;
msi-controller;
al,msi-base-spi = <336>;
al,msi-num-spis = <959>;
interrupt-parent = <&gic>;
};
io-fabric {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0xfc000000 0x2000000>;
uart0: serial@1883000 {
compatible = "ns16550a";
reg = <0x1883000 0x1000>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <0>; /* Filled by firmware */
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
};
uart1: serial@1884000 {
compatible = "ns16550a";
reg = <0x1884000 0x1000>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <0>; /* Filled by firmware */
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
};
uart2: serial@1885000 {
compatible = "ns16550a";
reg = <0x1885000 0x1000>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <0>; /* Filled by firmware */
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
};
uart3: serial@1886000 {
compatible = "ns16550a";
reg = <0x1886000 0x1000>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <0>; /* Filled by firmware */
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
};
};
};
};

4
arch/arm64/boot/dts/amd/Makefile
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@ -1,4 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_SEATTLE) += amd-overdrive.dtb \
amd-overdrive-rev-b0.dtb amd-overdrive-rev-b1.dtb \
husky.dtb

88
arch/arm64/boot/dts/amd/amd-overdrive-rev-b0.dts
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@ -1,88 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* DTS file for AMD Seattle Overdrive Development Board
* Note: For Seattle Rev.B0
*
* Copyright (C) 2015 Advanced Micro Devices, Inc.
*/
/dts-v1/;
/include/ "amd-seattle-soc.dtsi"
/ {
model = "AMD Seattle (Rev.B0) Development Board (Overdrive)";
compatible = "amd,seattle-overdrive", "amd,seattle";
chosen {
stdout-path = &serial0;
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
};
&ccp0 {
status = "ok";
amd,zlib-support = <1>;
};
/**
* NOTE: In Rev.B, gpio0 is reserved.
*/
&gpio1 {
status = "ok";
};
&gpio2 {
status = "ok";
};
&gpio3 {
status = "ok";
};
&gpio4 {
status = "ok";
};
&i2c0 {
status = "ok";
};
&i2c1 {
status = "ok";
};
&pcie0 {
status = "ok";
};
&spi0 {
status = "ok";
};
&spi1 {
status = "ok";
sdcard0: sdcard@0 {
compatible = "mmc-spi-slot";
reg = <0>;
spi-max-frequency = <20000000>;
voltage-ranges = <3200 3400>;
pl022,hierarchy = <0>;
pl022,interface = <0>;
pl022,com-mode = <0x0>;
pl022,rx-level-trig = <0>;
pl022,tx-level-trig = <0>;
};
};
&ipmi_kcs {
status = "ok";
};
&smb0 {
/include/ "amd-seattle-xgbe-b.dtsi"
};

92
arch/arm64/boot/dts/amd/amd-overdrive-rev-b1.dts
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@ -1,92 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* DTS file for AMD Seattle Overdrive Development Board
* Note: For Seattle Rev.B1
*
* Copyright (C) 2015 Advanced Micro Devices, Inc.
*/
/dts-v1/;
/include/ "amd-seattle-soc.dtsi"
/ {
model = "AMD Seattle (Rev.B1) Development Board (Overdrive)";
compatible = "amd,seattle-overdrive", "amd,seattle";
chosen {
stdout-path = &serial0;
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
};
&ccp0 {
status = "ok";
amd,zlib-support = <1>;
};
/**
* NOTE: In Rev.B, gpio0 is reserved.
*/
&gpio1 {
status = "ok";
};
&gpio2 {
status = "ok";
};
&gpio3 {
status = "ok";
};
&gpio4 {
status = "ok";
};
&i2c0 {
status = "ok";
};
&i2c1 {
status = "ok";
};
&pcie0 {
status = "ok";
};
&sata1 {
status = "ok";
};
&spi0 {
status = "ok";
};
&spi1 {
status = "ok";
sdcard0: sdcard@0 {
compatible = "mmc-spi-slot";
reg = <0>;
spi-max-frequency = <20000000>;
voltage-ranges = <3200 3400>;
pl022,hierarchy = <0>;
pl022,interface = <0>;
pl022,com-mode = <0x0>;
pl022,rx-level-trig = <0>;
pl022,tx-level-trig = <0>;
};
};
&ipmi_kcs {
status = "ok";
};
&smb0 {
/include/ "amd-seattle-xgbe-b.dtsi"
};

66
arch/arm64/boot/dts/amd/amd-overdrive.dts
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@ -1,66 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* DTS file for AMD Seattle Overdrive Development Board
*
* Copyright (C) 2014 Advanced Micro Devices, Inc.
*/
/dts-v1/;
/include/ "amd-seattle-soc.dtsi"
/ {
model = "AMD Seattle Development Board (Overdrive)";
compatible = "amd,seattle-overdrive", "amd,seattle";
chosen {
stdout-path = &serial0;
};
};
&ccp0 {
status = "ok";
};
&gpio0 {
status = "ok";
};
&gpio1 {
status = "ok";
};
&i2c0 {
status = "ok";
};
&pcie0 {
status = "ok";
};
&spi0 {
status = "ok";
};
&spi1 {
status = "ok";
sdcard0: sdcard@0 {
compatible = "mmc-spi-slot";
reg = <0>;
spi-max-frequency = <20000000>;
voltage-ranges = <3200 3400>;
gpios = <&gpio0 7 0>;
interrupt-parent = <&gpio0>;
interrupts = <7 3>;
pl022,hierarchy = <0>;
pl022,interface = <0>;
pl022,com-mode = <0x0>;
pl022,rx-level-trig = <0>;
pl022,tx-level-trig = <0>;
};
};
&v2m0 {
arm,msi-base-spi = <64>;
arm,msi-num-spis = <256>;
};

55
arch/arm64/boot/dts/amd/amd-seattle-clks.dtsi
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@ -1,55 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* DTS file for AMD Seattle Clocks
*
* Copyright (C) 2014 Advanced Micro Devices, Inc.
*/
adl3clk_100mhz: clk100mhz_0 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
clock-output-names = "adl3clk_100mhz";
};
ccpclk_375mhz: clk375mhz {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <375000000>;
clock-output-names = "ccpclk_375mhz";
};
sataclk_333mhz: clk333mhz {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <333000000>;
clock-output-names = "sataclk_333mhz";
};
pcieclk_500mhz: clk500mhz_0 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <500000000>;
clock-output-names = "pcieclk_500mhz";
};
dmaclk_500mhz: clk500mhz_1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <500000000>;
clock-output-names = "dmaclk_500mhz";
};
miscclk_250mhz: clk250mhz_4 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <250000000>;
clock-output-names = "miscclk_250mhz";
};
uartspiclk_100mhz: clk100mhz_1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
clock-output-names = "uartspiclk_100mhz";
};

251
arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
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@ -1,251 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* DTS file for AMD Seattle SoC
*
* Copyright (C) 2014 Advanced Micro Devices, Inc.
*/
/ {
compatible = "amd,seattle";
interrupt-parent = <&gic0>;
#address-cells = <2>;
#size-cells = <2>;
gic0: interrupt-controller@e1101000 {
compatible = "arm,gic-400", "arm,cortex-a15-gic";
interrupt-controller;
#interrupt-cells = <3>;
#address-cells = <2>;
#size-cells = <2>;
reg = <0x0 0xe1110000 0 0x1000>,
<0x0 0xe112f000 0 0x2000>,
<0x0 0xe1140000 0 0x2000>,
<0x0 0xe1160000 0 0x2000>;
interrupts = <1 9 0xf04>;
ranges = <0 0 0 0xe1100000 0 0x100000>;
v2m0: v2m@e0080000 {
compatible = "arm,gic-v2m-frame";
msi-controller;
reg = <0x0 0x00080000 0 0x1000>;
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <1 13 0xff04>,
<1 14 0xff04>,
<1 11 0xff04>,
<1 10 0xff04>;
};
pmu {
compatible = "arm,armv8-pmuv3";
interrupts = <0 7 4>,
<0 8 4>,
<0 9 4>,
<0 10 4>,
<0 11 4>,
<0 12 4>,
<0 13 4>,
<0 14 4>;
};
smb0: smb {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
/*
* dma-ranges is 40-bit address space containing:
* - GICv2m MSI register is at 0xe0080000
* - DRAM range [0x8000000000 to 0xffffffffff]
*/
dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
/include/ "amd-seattle-clks.dtsi"
sata0: sata@e0300000 {
compatible = "snps,dwc-ahci";
reg = <0 0xe0300000 0 0xf0000>;
interrupts = <0 355 4>;
clocks = <&sataclk_333mhz>;
dma-coherent;
};
/* This is for Rev B only */
sata1: sata@e0d00000 {
status = "disabled";
compatible = "snps,dwc-ahci";
reg = <0 0xe0d00000 0 0xf0000>;
interrupts = <0 354 4>;
clocks = <&sataclk_333mhz>;
dma-coherent;
};
i2c0: i2c@e1000000 {
status = "disabled";
compatible = "snps,designware-i2c";
reg = <0 0xe1000000 0 0x1000>;
interrupts = <0 357 4>;
clocks = <&miscclk_250mhz>;
};
i2c1: i2c@e0050000 {
status = "disabled";
compatible = "snps,designware-i2c";
reg = <0 0xe0050000 0 0x1000>;
interrupts = <0 340 4>;
clocks = <&miscclk_250mhz>;
};
serial0: serial@e1010000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0 0xe1010000 0 0x1000>;
interrupts = <0 328 4>;
clocks = <&uartspiclk_100mhz>, <&uartspiclk_100mhz>;
clock-names = "uartclk", "apb_pclk";
};
spi0: spi@e1020000 {
status = "disabled";
compatible = "arm,pl022", "arm,primecell";
reg = <0 0xe1020000 0 0x1000>;
spi-controller;
interrupts = <0 330 4>;
clocks = <&uartspiclk_100mhz>;
clock-names = "apb_pclk";
};
spi1: spi@e1030000 {
status = "disabled";
compatible = "arm,pl022", "arm,primecell";
reg = <0 0xe1030000 0 0x1000>;
spi-controller;
interrupts = <0 329 4>;
clocks = <&uartspiclk_100mhz>;
clock-names = "apb_pclk";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
};
gpio0: gpio@e1040000 { /* Not available to OS for B0 */
status = "disabled";
compatible = "arm,pl061", "arm,primecell";
#gpio-cells = <2>;
reg = <0 0xe1040000 0 0x1000>;
gpio-controller;
interrupts = <0 359 4>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&miscclk_250mhz>;
clock-names = "apb_pclk";
};
gpio1: gpio@e1050000 { /* [0:7] */
status = "disabled";
compatible = "arm,pl061", "arm,primecell";
#gpio-cells = <2>;
reg = <0 0xe1050000 0 0x1000>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <0 358 4>;
clocks = <&miscclk_250mhz>;
clock-names = "apb_pclk";
};
gpio2: gpio@e0020000 { /* [8:15] */
status = "disabled";
compatible = "arm,pl061", "arm,primecell";
#gpio-cells = <2>;
reg = <0 0xe0020000 0 0x1000>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <0 366 4>;
clocks = <&miscclk_250mhz>;
clock-names = "apb_pclk";
};
gpio3: gpio@e0030000 { /* [16:23] */
status = "disabled";
compatible = "arm,pl061", "arm,primecell";
#gpio-cells = <2>;
reg = <0 0xe0030000 0 0x1000>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <0 365 4>;
clocks = <&miscclk_250mhz>;
clock-names = "apb_pclk";
};
gpio4: gpio@e0080000 { /* [24] */
status = "disabled";
compatible = "arm,pl061", "arm,primecell";
#gpio-cells = <2>;
reg = <0 0xe0080000 0 0x1000>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <0 361 4>;
clocks = <&miscclk_250mhz>;
clock-names = "apb_pclk";
};
ccp0: ccp@e0100000 {
status = "disabled";
compatible = "amd,ccp-seattle-v1a";
reg = <0 0xe0100000 0 0x10000>;
interrupts = <0 3 4>;
dma-coherent;
};
pcie0: pcie@f0000000 {
compatible = "pci-host-ecam-generic";
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
device_type = "pci";
bus-range = <0 0x7f>;
msi-parent = <&v2m0>;
reg = <0 0xf0000000 0 0x10000000>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map =
<0x1000 0x0 0x0 0x1 &gic0 0x0 0x0 0x0 0x120 0x1>,
<0x1000 0x0 0x0 0x2 &gic0 0x0 0x0 0x0 0x121 0x1>,
<0x1000 0x0 0x0 0x3 &gic0 0x0 0x0 0x0 0x122 0x1>,
<0x1000 0x0 0x0 0x4 &gic0 0x0 0x0 0x0 0x123 0x1>;
dma-coherent;
dma-ranges = <0x43000000 0x0 0x0 0x0 0x0 0x100 0x0>;
ranges =
/* I/O Memory (size=64K) */
<0x01000000 0x00 0x00000000 0x00 0xefff0000 0x00 0x00010000>,
/* 32-bit MMIO (size=2G) */
<0x02000000 0x00 0x40000000 0x00 0x40000000 0x00 0x80000000>,
/* 64-bit MMIO (size= 124G) */
<0x03000000 0x01 0x00000000 0x01 0x00000000 0x7f 0x00000000>;
};
/* Perf CCN504 PMU */
ccn: ccn@e8000000 {
compatible = "arm,ccn-504";
reg = <0x0 0xe8000000 0 0x1000000>;
interrupts = <0 380 4>;
};
ipmi_kcs: kcs@e0010000 {
status = "disabled";
compatible = "ipmi-kcs";
device_type = "ipmi";
reg = <0x0 0xe0010000 0 0x8>;
interrupts = <0 389 4>;
reg-size = <1>;
reg-spacing = <4>;
};
};
};

118
arch/arm64/boot/dts/amd/amd-seattle-xgbe-b.dtsi
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@ -1,118 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* DTS file for AMD Seattle XGBE (RevB)
*
* Copyright (C) 2015 Advanced Micro Devices, Inc.
*/
xgmacclk0_dma_250mhz: clk250mhz_0 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <250000000>;
clock-output-names = "xgmacclk0_dma_250mhz";
};
xgmacclk0_ptp_250mhz: clk250mhz_1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <250000000>;
clock-output-names = "xgmacclk0_ptp_250mhz";
};
xgmacclk1_dma_250mhz: clk250mhz_2 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <250000000>;
clock-output-names = "xgmacclk1_dma_250mhz";
};
xgmacclk1_ptp_250mhz: clk250mhz_3 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <250000000>;
clock-output-names = "xgmacclk1_ptp_250mhz";
};
xgmac0: xgmac@e0700000 {
compatible = "amd,xgbe-seattle-v1a";
reg = <0 0xe0700000 0 0x80000>,
<0 0xe0780000 0 0x80000>,
<0 0xe1240800 0 0x00400>, /* SERDES RX/TX0 */
<0 0xe1250000 0 0x00060>, /* SERDES IR 1/2 */
<0 0xe12500f8 0 0x00004>; /* SERDES IR 2/2 */
interrupts = <0 325 4>,
<0 346 1>, <0 347 1>, <0 348 1>, <0 349 1>,
<0 323 4>;
amd,per-channel-interrupt;
amd,speed-set = <0>;
amd,serdes-blwc = <1>, <1>, <0>;
amd,serdes-cdr-rate = <2>, <2>, <7>;
amd,serdes-pq-skew = <10>, <10>, <18>;
amd,serdes-tx-amp = <0>, <0>, <0>;
amd,serdes-dfe-tap-config = <3>, <3>, <3>;
amd,serdes-dfe-tap-enable = <0>, <0>, <7>;
mac-address = [ 02 A1 A2 A3 A4 A5 ];
clocks = <&xgmacclk0_dma_250mhz>, <&xgmacclk0_ptp_250mhz>;
clock-names = "dma_clk", "ptp_clk";
phy-mode = "xgmii";
#stream-id-cells = <16>;
dma-coherent;
};
xgmac1: xgmac@e0900000 {
compatible = "amd,xgbe-seattle-v1a";
reg = <0 0xe0900000 0 0x80000>,
<0 0xe0980000 0 0x80000>,
<0 0xe1240c00 0 0x00400>, /* SERDES RX/TX1 */
<0 0xe1250080 0 0x00060>, /* SERDES IR 1/2 */
<0 0xe12500fc 0 0x00004>; /* SERDES IR 2/2 */
interrupts = <0 324 4>,
<0 341 1>, <0 342 1>, <0 343 1>, <0 344 1>,
<0 322 4>;
amd,per-channel-interrupt;
amd,speed-set = <0>;
amd,serdes-blwc = <1>, <1>, <0>;
amd,serdes-cdr-rate = <2>, <2>, <7>;
amd,serdes-pq-skew = <10>, <10>, <18>;
amd,serdes-tx-amp = <0>, <0>, <0>;
amd,serdes-dfe-tap-config = <3>, <3>, <3>;
amd,serdes-dfe-tap-enable = <0>, <0>, <7>;
mac-address = [ 02 B1 B2 B3 B4 B5 ];
clocks = <&xgmacclk1_dma_250mhz>, <&xgmacclk1_ptp_250mhz>;
clock-names = "dma_clk", "ptp_clk";
phy-mode = "xgmii";
#stream-id-cells = <16>;
dma-coherent;
};
xgmac0_smmu: smmu@e0600000 {
compatible = "arm,mmu-401";
reg = <0 0xe0600000 0 0x10000>;
#global-interrupts = <1>;
interrupts = /* Uses combined intr for both
* global and context
*/
<0 336 4>,
<0 336 4>;
mmu-masters = <&xgmac0
0 1 2 3 4 5 6 7
16 17 18 19 20 21 22 23
>;
};
xgmac1_smmu: smmu@e0800000 {
compatible = "arm,mmu-401";
reg = <0 0xe0800000 0 0x10000>;
#global-interrupts = <1>;
interrupts = /* Uses combined intr for both
* global and context
*/
<0 335 4>,
<0 335 4>;
mmu-masters = <&xgmac1
0 1 2 3 4 5 6 7
16 17 18 19 20 21 22 23
>;
};

84
arch/arm64/boot/dts/amd/husky.dts
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@ -1,84 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* DTS file for AMD/Linaro 96Boards Enterprise Edition Server (Husky) Board
* Note: Based-on AMD Seattle Rev.B0
*
* Copyright (C) 2015 Advanced Micro Devices, Inc.
*/
/dts-v1/;
/include/ "amd-seattle-soc.dtsi"
/ {
model = "Linaro 96Boards Enterprise Edition Server (Husky) Board";
compatible = "amd,seattle-overdrive", "amd,seattle";
chosen {
stdout-path = &serial0;
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
};
&ccp0 {
status = "ok";
amd,zlib-support = <1>;
};
/**
* NOTE: In Rev.B, gpio0 is reserved.
*/
&gpio1 {
status = "ok";
};
&gpio2 {
status = "ok";
};
&gpio3 {
status = "ok";
};
&gpio4 {
status = "ok";
};
&i2c0 {
status = "ok";
};
&i2c1 {
status = "ok";
};
&pcie0 {
status = "ok";
};
&spi0 {
status = "ok";
};
&spi1 {
status = "ok";
sdcard0: sdcard@0 {
compatible = "mmc-spi-slot";
reg = <0>;
spi-max-frequency = <20000000>;
voltage-ranges = <3200 3400>;
pl022,hierarchy = <0>;
pl022,interface = <0>;
pl022,com-mode = <0x0>;
pl022,rx-level-trig = <0>;
pl022,tx-level-trig = <0>;
};
};
&smb0 {
/include/ "amd-seattle-xgbe-b.dtsi"
};

50
arch/arm64/boot/dts/amlogic/Makefile
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@ -1,50 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_MESON) += meson-axg-s400.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12a-sei510.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12a-u200.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12a-x96-max.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking-pro.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-khadas-vim3.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-s922x-khadas-vim3.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-odroid-n2.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-odroid-n2-plus.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-ugoos-am6.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-kii-pro.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nanopi-k2.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-nexbox-a95x.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-odroidc2.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-p200.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-p201.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-vega-s95-pro.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-vega-s95-meta.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-vega-s95-telos.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-wetek-hub.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-wetek-play2.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s805x-libretech-ac.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-hwacom-amazetv.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-khadas-vim.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-libretech-cc.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-libretech-cc-v2.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-nexbox-a95x.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-p212.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p230.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p231.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-phicomm-n1.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-sml5442tw.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s805x-p241.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905w-p281.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905w-tx3-mini.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-libretech-pc.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-khadas-vim2.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-nexbox-a1.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q200.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q201.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-rbox-pro.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-s912-libretech-pc.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-vega-s96.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-wetek-core2.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-sei610.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-khadas-vim3l.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-c4.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb

30
arch/arm64/boot/dts/amlogic/meson-a1-ad401.dts
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@ -1,30 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
*/
/dts-v1/;
#include "meson-a1.dtsi"
/ {
compatible = "amlogic,ad401", "amlogic,a1";
model = "Amlogic Meson A1 AD401 Development Board";
aliases {
serial0 = &uart_AO_B;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x8000000>;
};
};
&uart_AO_B {
status = "okay";
};

161
arch/arm64/boot/dts/amlogic/meson-a1.dtsi
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@ -1,161 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/meson-a1-gpio.h>
/ {
compatible = "amlogic,a1";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
cpus {
#address-cells = <2>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a35";
reg = <0x0 0x0>;
enable-method = "psci";
next-level-cache = <&l2>;
};
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a35";
reg = <0x0 0x1>;
enable-method = "psci";
next-level-cache = <&l2>;
};
l2: l2-cache0 {
compatible = "cache";
};
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x800000>;
alignment = <0x0 0x400000>;
linux,cma-default;
};
};
sm: secure-monitor {
compatible = "amlogic,meson-gxbb-sm";
pwrc: power-controller {
compatible = "amlogic,meson-a1-pwrc";
#power-domain-cells = <1>;
status = "okay";
};
};
soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
apb: bus@fe000000 {
compatible = "simple-bus";
reg = <0x0 0xfe000000 0x0 0x1000000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x1000000>;
reset: reset-controller@0 {
compatible = "amlogic,meson-a1-reset";
reg = <0x0 0x0 0x0 0x8c>;
#reset-cells = <1>;
};
periphs_pinctrl: pinctrl@0400 {
compatible = "amlogic,meson-a1-periphs-pinctrl";
#address-cells = <2>;
#size-cells = <2>;
ranges;
gpio: bank@0400 {
reg = <0x0 0x0400 0x0 0x003c>,
<0x0 0x0480 0x0 0x0118>;
reg-names = "mux", "gpio";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 0 62>;
};
};
uart_AO: serial@1c00 {
compatible = "amlogic,meson-gx-uart",
"amlogic,meson-ao-uart";
reg = <0x0 0x1c00 0x0 0x18>;
interrupts = <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>, <&xtal>, <&xtal>;
clock-names = "xtal", "pclk", "baud";
status = "disabled";
};
uart_AO_B: serial@2000 {
compatible = "amlogic,meson-gx-uart",
"amlogic,meson-ao-uart";
reg = <0x0 0x2000 0x0 0x18>;
interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>, <&xtal>, <&xtal>;
clock-names = "xtal", "pclk", "baud";
status = "disabled";
};
};
gic: interrupt-controller@ff901000 {
compatible = "arm,gic-400";
reg = <0x0 0xff901000 0x0 0x1000>,
<0x0 0xff902000 0x0 0x2000>,
<0x0 0xff904000 0x0 0x2000>,
<0x0 0xff906000 0x0 0x2000>;
interrupt-controller;
interrupts = <GIC_PPI 9
(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
#interrupt-cells = <3>;
#address-cells = <0>;
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13
(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14
(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11
(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10
(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
};
xtal: xtal-clk {
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "xtal";
#clock-cells = <0>;
};
};

592
arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
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@ -1,592 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2017 Amlogic, Inc. All rights reserved.
*/
/dts-v1/;
#include "meson-axg.dtsi"
#include <dt-bindings/input/input.h>
/ {
compatible = "amlogic,s400", "amlogic,a113d", "amlogic,meson-axg";
model = "Amlogic Meson AXG S400 Development Board";
adc_keys {
compatible = "adc-keys";
io-channels = <&saradc 0>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
button-next {
label = "Next";
linux,code = <KEY_NEXT>;
press-threshold-microvolt = <1116000>; /* 62% */
};
button-prev {
label = "Previous";
linux,code = <KEY_PREVIOUS>;
press-threshold-microvolt = <900000>; /* 50% */
};
button-wifi {
label = "Wifi";
linux,code = <KEY_WLAN>;
press-threshold-microvolt = <684000>; /* 38% */
};
button-up {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
press-threshold-microvolt = <468000>; /* 26% */
};
button-down {
label = "Volume Down";
linux,code = <KEY_VOLUMEDOWN>;
press-threshold-microvolt = <252000>; /* 14% */
};
button-voice {
label = "Voice";
linux,code = <KEY_VOICECOMMAND>;
press-threshold-microvolt = <0>; /* 0% */
};
};
aliases {
serial0 = &uart_AO;
serial1 = &uart_A;
};
linein: audio-codec-0 {
#sound-dai-cells = <0>;
compatible = "everest,es7241";
VDDA-supply = <&vcc_3v3>;
VDDP-supply = <&vcc_3v3>;
VDDD-supply = <&vcc_3v3>;
status = "okay";
sound-name-prefix = "Linein";
};
lineout: audio-codec-1 {
#sound-dai-cells = <0>;
compatible = "everest,es7154";
VDD-supply = <&vcc_3v3>;
PVDD-supply = <&vcc_5v>;
status = "okay";
sound-name-prefix = "Lineout";
};
spdif_dit: audio-codec-2 {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dit";
status = "okay";
sound-name-prefix = "DIT";
};
dmics: audio-codec-3 {
#sound-dai-cells = <0>;
compatible = "dmic-codec";
num-channels = <7>;
wakeup-delay-ms = <50>;
status = "okay";
sound-name-prefix = "MIC";
};
spdif_dir: audio-codec-4 {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dir";
status = "okay";
sound-name-prefix = "DIR";
};
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x40000000>;
};
main_12v: regulator-main_12v {
compatible = "regulator-fixed";
regulator-name = "12V";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
regulator-always-on;
};
vcc_3v3: regulator-vcc_3v3 {
compatible = "regulator-fixed";
regulator-name = "VCC_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vddao_3v3>;
regulator-always-on;
};
vcc_5v: regulator-vcc_5v {
compatible = "regulator-fixed";
regulator-name = "VCC5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&main_12v>;
gpio = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vddao_3v3: regulator-vddao_3v3 {
compatible = "regulator-fixed";
regulator-name = "VDDAO_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&main_12v>;
regulator-always-on;
};
vddio_ao18: regulator-vddio_ao18 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vddao_3v3>;
regulator-always-on;
};
vddio_boot: regulator-vddio_boot {
compatible = "regulator-fixed";
regulator-name = "VDDIO_BOOT";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vddao_3v3>;
regulator-always-on;
};
usb_pwr: regulator-usb_pwr {
compatible = "regulator-fixed";
regulator-name = "USB_PWR";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc_5v>;
gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpio GPIOX_7 GPIO_ACTIVE_LOW>;
clocks = <&wifi32k>;
clock-names = "ext_clock";
};
speaker-leds {
compatible = "gpio-leds";
aled1 {
label = "speaker:aled1";
gpios = <&gpio_speaker 7 0>;
};
aled2 {
label = "speaker:aled2";
gpios = <&gpio_speaker 6 0>;
};
aled3 {
label = "speaker:aled3";
gpios = <&gpio_speaker 5 0>;
};
aled4 {
label = "speaker:aled4";
gpios = <&gpio_speaker 4 0>;
};
aled5 {
label = "speaker:aled5";
gpios = <&gpio_speaker 3 0>;
};
aled6 {
label = "speaker:aled6";
gpios = <&gpio_speaker 2 0>;
};
};
sound {
compatible = "amlogic,axg-sound-card";
model = "AXG-S400";
audio-aux-devs = <&tdmin_a>, <&tdmin_b>, <&tdmin_c>,
<&tdmin_lb>, <&tdmout_c>;
audio-widgets = "Line", "Lineout",
"Line", "Linein",
"Speaker", "Speaker1 Left",
"Speaker", "Speaker1 Right";
audio-routing = "TDMOUT_C IN 0", "FRDDR_A OUT 2",
"SPDIFOUT IN 0", "FRDDR_A OUT 3",
"TDMOUT_C IN 1", "FRDDR_B OUT 2",
"SPDIFOUT IN 1", "FRDDR_B OUT 3",
"TDMOUT_C IN 2", "FRDDR_C OUT 2",
"SPDIFOUT IN 2", "FRDDR_C OUT 3",
"TDM_C Playback", "TDMOUT_C OUT",
"TDMIN_A IN 2", "TDM_C Capture",
"TDMIN_A IN 5", "TDM_C Loopback",
"TDMIN_B IN 2", "TDM_C Capture",
"TDMIN_B IN 5", "TDM_C Loopback",
"TDMIN_C IN 2", "TDM_C Capture",
"TDMIN_C IN 5", "TDM_C Loopback",
"TDMIN_LB IN 2", "TDM_C Loopback",
"TDMIN_LB IN 5", "TDM_C Capture",
"TODDR_A IN 0", "TDMIN_A OUT",
"TODDR_B IN 0", "TDMIN_A OUT",
"TODDR_C IN 0", "TDMIN_A OUT",
"TODDR_A IN 1", "TDMIN_B OUT",
"TODDR_B IN 1", "TDMIN_B OUT",
"TODDR_C IN 1", "TDMIN_B OUT",
"TODDR_A IN 2", "TDMIN_C OUT",
"TODDR_B IN 2", "TDMIN_C OUT",
"TODDR_C IN 2", "TDMIN_C OUT",
"TODDR_A IN 3", "SPDIFIN Capture",
"TODDR_B IN 3", "SPDIFIN Capture",
"TODDR_C IN 3", "SPDIFIN Capture",
"TODDR_A IN 4", "PDM Capture",
"TODDR_B IN 4", "PDM Capture",
"TODDR_C IN 4", "PDM Capture",
"TODDR_A IN 6", "TDMIN_LB OUT",
"TODDR_B IN 6", "TDMIN_LB OUT",
"TODDR_C IN 6", "TDMIN_LB OUT",
"Lineout", "Lineout AOUTL",
"Lineout", "Lineout AOUTR",
"Speaker1 Left", "SPK1 OUT_A",
"Speaker1 Left", "SPK1 OUT_B",
"Speaker1 Right", "SPK1 OUT_C",
"Speaker1 Right", "SPK1 OUT_D",
"Linein AINL", "Linein",
"Linein AINR", "Linein";
assigned-clocks = <&clkc CLKID_HIFI_PLL>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clock-parents = <0>, <0>, <0>;
assigned-clock-rates = <589824000>,
<270950400>,
<393216000>;
status = "okay";
dai-link-0 {
sound-dai = <&frddr_a>;
};
dai-link-1 {
sound-dai = <&frddr_b>;
};
dai-link-2 {
sound-dai = <&frddr_c>;
};
dai-link-3 {
sound-dai = <&toddr_a>;
};
dai-link-4 {
sound-dai = <&toddr_b>;
};
dai-link-5 {
sound-dai = <&toddr_c>;
};
dai-link-6 {
sound-dai = <&tdmif_c>;
dai-format = "i2s";
dai-tdm-slot-tx-mask-2 = <1 1>;
dai-tdm-slot-rx-mask-1 = <1 1>;
mclk-fs = <256>;
codec-0 {
sound-dai = <&lineout>;
};
codec-1 {
sound-dai = <&speaker_amp1>;
};
codec-2 {
sound-dai = <&linein>;
};
};
dai-link-7 {
sound-dai = <&spdifout>;
codec {
sound-dai = <&spdif_dit>;
};
};
dai-link-8 {
sound-dai = <&spdifin>;
codec {
sound-dai = <&spdif_dir>;
};
};
dai-link-9 {
sound-dai = <&pdm>;
codec {
sound-dai = <&dmics>;
};
};
};
wifi32k: wifi32k {
compatible = "pwm-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
pwms = <&pwm_ab 0 30518 0>; /* PWM_A at 32.768KHz */
};
};
&ethmac {
status = "okay";
pinctrl-0 = <&eth_rgmii_y_pins>;
pinctrl-names = "default";
phy-handle = <&eth_phy0>;
phy-mode = "rgmii";
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
eth_phy0: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
reg = <0>;
interrupt-parent = <&gpio_intc>;
interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
eee-broken-1000t;
};
};
};
&frddr_a {
status = "okay";
};
&frddr_b {
status = "okay";
};
&frddr_c {
status = "okay";
};
&ir {
status = "okay";
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
};
&i2c1 {
status = "okay";
pinctrl-0 = <&i2c1_z_pins>;
pinctrl-names = "default";
speaker_amp1: audio-codec@1b {
compatible = "ti,tas5707";
reg = <0x1b>;
reset-gpios = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_LOW>;
#sound-dai-cells = <0>;
AVDD-supply = <&vcc_3v3>;
DVDD-supply = <&vcc_3v3>;
PVDD_A-supply = <&main_12v>;
PVDD_B-supply = <&main_12v>;
PVDD_C-supply = <&main_12v>;
PVDD_D-supply = <&main_12v>;
sound-name-prefix = "SPK1";
};
};
&i2c_AO {
status = "okay";
pinctrl-0 = <&i2c_ao_sck_10_pins>, <&i2c_ao_sda_11_pins>;
pinctrl-names = "default";
gpio_speaker: gpio-controller@1f {
compatible = "nxp,pca9557";
reg = <0x1f>;
gpio-controller;
#gpio-cells = <2>;
vcc-supply = <&vddao_3v3>;
};
};
&pdm {
pinctrl-0 = <&pdm_dclk_a14_pins>, <&pdm_din0_pins>,
<&pdm_din1_pins>, <&pdm_din2_pins>, <&pdm_din3_pins>;
pinctrl-names = "default";
status = "okay";
};
&pwm_ab {
status = "okay";
pinctrl-0 = <&pwm_a_x20_pins>;
pinctrl-names = "default";
};
&saradc {
status = "okay";
vref-supply = <&vddio_ao18>;
};
/* wifi module */
&sd_emmc_b {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&sdio_pins>;
pinctrl-1 = <&sdio_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <4>;
cap-sd-highspeed;
sd-uhs-sdr104;
max-frequency = <200000000>;
non-removable;
disable-wp;
mmc-pwrseq = <&sdio_pwrseq>;
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vddio_boot>;
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
};
};
/* emmc storage */
&sd_emmc_c {
status = "okay";
pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
pinctrl-1 = <&emmc_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <8>;
cap-mmc-highspeed;
max-frequency = <200000000>;
non-removable;
disable-wp;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
mmc-pwrseq = <&emmc_pwrseq>;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&vddio_boot>;
};
&spdifin {
pinctrl-0 = <&spdif_in_a19_pins>;
pinctrl-names = "default";
status = "okay";
};
&spdifout {
pinctrl-0 = <&spdif_out_a20_pins>;
pinctrl-names = "default";
status = "okay";
};
&tdmif_a {
pinctrl-0 = <&tdma_sclk_pins>, <&tdma_fs_pins>,
<&tdma_din0_pins>, <&tdma_dout0_x15_pins>;
pinctrl-names = "default";
status = "okay";
};
&tdmif_b {
pinctrl-0 = <&tdmb_sclk_pins>, <&tdmb_fs_pins>,
<&tdmb_din3_pins>, <&mclk_b_pins>;
pinctrl-names = "default";
status = "okay";
};
&tdmif_c {
pinctrl-0 = <&tdmc_sclk_pins>, <&tdmc_fs_pins>,
<&tdmc_din1_pins>, <&tdmc_dout2_pins>,
<&mclk_c_pins>;
pinctrl-names = "default";
status = "okay";
};
&tdmin_a {
status = "okay";
};
&tdmin_b {
status = "okay";
};
&tdmin_c {
status = "okay";
};
&tdmin_lb {
status = "okay";
};
&tdmout_c {
status = "okay";
};
&toddr_a {
status = "okay";
};
&toddr_b {
status = "okay";
};
&toddr_c {
status = "okay";
};
&uart_A {
status = "okay";
pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
pinctrl-names = "default";
uart-has-rtscts;
bluetooth {
compatible = "brcm,bcm43438-bt";
shutdown-gpios = <&gpio GPIOX_21 GPIO_ACTIVE_HIGH>;
};
};
&uart_AO {
status = "okay";
pinctrl-0 = <&uart_ao_a_pins>;
pinctrl-names = "default";
};
&usb {
status = "okay";
dr_mode = "otg";
vbus-supply = <&usb_pwr>;
};

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arch/arm64/boot/dts/amlogic/meson-axg.dtsi
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2431
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
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arch/arm64/boot/dts/amlogic/meson-g12.dtsi
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@ -1,385 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre, SAS
* Author: Jerome Brunet <jbrunet@baylibre.com>
*/
#include "meson-g12-common.dtsi"
#include <dt-bindings/clock/axg-audio-clkc.h>
#include <dt-bindings/power/meson-g12a-power.h>
#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
#include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
/ {
tdmif_a: audio-controller-0 {
compatible = "amlogic,axg-tdm-iface";
#sound-dai-cells = <0>;
sound-name-prefix = "TDM_A";
clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
<&clkc_audio AUD_CLKID_MST_A_SCLK>,
<&clkc_audio AUD_CLKID_MST_A_LRCLK>;
clock-names = "mclk", "sclk", "lrclk";
status = "disabled";
};
tdmif_b: audio-controller-1 {
compatible = "amlogic,axg-tdm-iface";
#sound-dai-cells = <0>;
sound-name-prefix = "TDM_B";
clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
<&clkc_audio AUD_CLKID_MST_B_SCLK>,
<&clkc_audio AUD_CLKID_MST_B_LRCLK>;
clock-names = "mclk", "sclk", "lrclk";
status = "disabled";
};
tdmif_c: audio-controller-2 {
compatible = "amlogic,axg-tdm-iface";
#sound-dai-cells = <0>;
sound-name-prefix = "TDM_C";
clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
<&clkc_audio AUD_CLKID_MST_C_SCLK>,
<&clkc_audio AUD_CLKID_MST_C_LRCLK>;
clock-names = "mclk", "sclk", "lrclk";
status = "disabled";
};
};
&apb {
pdm: audio-controller@40000 {
compatible = "amlogic,g12a-pdm",
"amlogic,axg-pdm";
reg = <0x0 0x40000 0x0 0x34>;
#sound-dai-cells = <0>;
sound-name-prefix = "PDM";
clocks = <&clkc_audio AUD_CLKID_PDM>,
<&clkc_audio AUD_CLKID_PDM_DCLK>,
<&clkc_audio AUD_CLKID_PDM_SYSCLK>;
clock-names = "pclk", "dclk", "sysclk";
resets = <&clkc_audio AUD_RESET_PDM>;
status = "disabled";
};
audio: bus@42000 {
compatible = "simple-bus";
reg = <0x0 0x42000 0x0 0x2000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0x42000 0x0 0x2000>;
clkc_audio: clock-controller@0 {
status = "disabled";
compatible = "amlogic,g12a-audio-clkc";
reg = <0x0 0x0 0x0 0xb4>;
#clock-cells = <1>;
#reset-cells = <1>;
clocks = <&clkc CLKID_AUDIO>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL3>,
<&clkc CLKID_HIFI_PLL>,
<&clkc CLKID_FCLK_DIV3>,
<&clkc CLKID_FCLK_DIV4>,
<&clkc CLKID_GP0_PLL>;
clock-names = "pclk",
"mst_in0",
"mst_in1",
"mst_in2",
"mst_in3",
"mst_in4",
"mst_in5",
"mst_in6",
"mst_in7";
resets = <&reset RESET_AUDIO>;
};
toddr_a: audio-controller@100 {
compatible = "amlogic,g12a-toddr",
"amlogic,axg-toddr";
reg = <0x0 0x100 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "TODDR_A";
interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
resets = <&arb AXG_ARB_TODDR_A>,
<&clkc_audio AUD_RESET_TODDR_A>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <512>;
status = "disabled";
};
toddr_b: audio-controller@140 {
compatible = "amlogic,g12a-toddr",
"amlogic,axg-toddr";
reg = <0x0 0x140 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "TODDR_B";
interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
resets = <&arb AXG_ARB_TODDR_B>,
<&clkc_audio AUD_RESET_TODDR_B>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <256>;
status = "disabled";
};
toddr_c: audio-controller@180 {
compatible = "amlogic,g12a-toddr",
"amlogic,axg-toddr";
reg = <0x0 0x180 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "TODDR_C";
interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
resets = <&arb AXG_ARB_TODDR_C>,
<&clkc_audio AUD_RESET_TODDR_C>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <256>;
status = "disabled";
};
frddr_a: audio-controller@1c0 {
compatible = "amlogic,g12a-frddr",
"amlogic,axg-frddr";
reg = <0x0 0x1c0 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "FRDDR_A";
interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
resets = <&arb AXG_ARB_FRDDR_A>,
<&clkc_audio AUD_RESET_FRDDR_A>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <512>;
status = "disabled";
};
frddr_b: audio-controller@200 {
compatible = "amlogic,g12a-frddr",
"amlogic,axg-frddr";
reg = <0x0 0x200 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "FRDDR_B";
interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
resets = <&arb AXG_ARB_FRDDR_B>,
<&clkc_audio AUD_RESET_FRDDR_B>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <256>;
status = "disabled";
};
frddr_c: audio-controller@240 {
compatible = "amlogic,g12a-frddr",
"amlogic,axg-frddr";
reg = <0x0 0x240 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "FRDDR_C";
interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
resets = <&arb AXG_ARB_FRDDR_C>,
<&clkc_audio AUD_RESET_FRDDR_C>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <256>;
status = "disabled";
};
arb: reset-controller@280 {
status = "disabled";
compatible = "amlogic,meson-axg-audio-arb";
reg = <0x0 0x280 0x0 0x4>;
#reset-cells = <1>;
clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
};
tdmin_a: audio-controller@300 {
compatible = "amlogic,g12a-tdmin",
"amlogic,axg-tdmin";
reg = <0x0 0x300 0x0 0x40>;
sound-name-prefix = "TDMIN_A";
resets = <&clkc_audio AUD_RESET_TDMIN_A>;
clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
<&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
<&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
<&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmin_b: audio-controller@340 {
compatible = "amlogic,g12a-tdmin",
"amlogic,axg-tdmin";
reg = <0x0 0x340 0x0 0x40>;
sound-name-prefix = "TDMIN_B";
resets = <&clkc_audio AUD_RESET_TDMIN_B>;
clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
<&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
<&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
<&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmin_c: audio-controller@380 {
compatible = "amlogic,g12a-tdmin",
"amlogic,axg-tdmin";
reg = <0x0 0x380 0x0 0x40>;
sound-name-prefix = "TDMIN_C";
resets = <&clkc_audio AUD_RESET_TDMIN_C>;
clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
<&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
<&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
<&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmin_lb: audio-controller@3c0 {
compatible = "amlogic,g12a-tdmin",
"amlogic,axg-tdmin";
reg = <0x0 0x3c0 0x0 0x40>;
sound-name-prefix = "TDMIN_LB";
resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
<&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
<&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
<&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
spdifin: audio-controller@400 {
compatible = "amlogic,g12a-spdifin",
"amlogic,axg-spdifin";
reg = <0x0 0x400 0x0 0x30>;
#sound-dai-cells = <0>;
sound-name-prefix = "SPDIFIN";
interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
<&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
clock-names = "pclk", "refclk";
resets = <&clkc_audio AUD_RESET_SPDIFIN>;
status = "disabled";
};
spdifout: audio-controller@480 {
compatible = "amlogic,g12a-spdifout",
"amlogic,axg-spdifout";
reg = <0x0 0x480 0x0 0x50>;
#sound-dai-cells = <0>;
sound-name-prefix = "SPDIFOUT";
clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
<&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
clock-names = "pclk", "mclk";
resets = <&clkc_audio AUD_RESET_SPDIFOUT>;
status = "disabled";
};
tdmout_a: audio-controller@500 {
compatible = "amlogic,g12a-tdmout";
reg = <0x0 0x500 0x0 0x40>;
sound-name-prefix = "TDMOUT_A";
resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
<&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmout_b: audio-controller@540 {
compatible = "amlogic,g12a-tdmout";
reg = <0x0 0x540 0x0 0x40>;
sound-name-prefix = "TDMOUT_B";
resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
<&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmout_c: audio-controller@580 {
compatible = "amlogic,g12a-tdmout";
reg = <0x0 0x580 0x0 0x40>;
sound-name-prefix = "TDMOUT_C";
resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
<&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
spdifout_b: audio-controller@680 {
compatible = "amlogic,g12a-spdifout",
"amlogic,axg-spdifout";
reg = <0x0 0x680 0x0 0x50>;
#sound-dai-cells = <0>;
sound-name-prefix = "SPDIFOUT_B";
clocks = <&clkc_audio AUD_CLKID_SPDIFOUT_B>,
<&clkc_audio AUD_CLKID_SPDIFOUT_B_CLK>;
clock-names = "pclk", "mclk";
resets = <&clkc_audio AUD_RESET_SPDIFOUT_B>;
status = "disabled";
};
toacodec: audio-controller@740 {
compatible = "amlogic,g12a-toacodec";
reg = <0x0 0x740 0x0 0x4>;
#sound-dai-cells = <1>;
sound-name-prefix = "TOACODEC";
resets = <&clkc_audio AUD_RESET_TOACODEC>;
status = "disabled";
};
tohdmitx: audio-controller@744 {
compatible = "amlogic,g12a-tohdmitx";
reg = <0x0 0x744 0x0 0x4>;
#sound-dai-cells = <1>;
sound-name-prefix = "TOHDMITX";
resets = <&clkc_audio AUD_RESET_TOHDMITX>;
status = "disabled";
};
};
};
&ethmac {
power-domains = <&pwrc PWRC_G12A_ETH_ID>;
};
&vpu {
power-domains = <&pwrc PWRC_G12A_VPU_ID>;
};
&sd_emmc_a {
amlogic,dram-access-quirk;
};
&simplefb_cvbs {
power-domains = <&pwrc PWRC_G12A_VPU_ID>;
};
&simplefb_hdmi {
power-domains = <&pwrc PWRC_G12A_VPU_ID>;
};

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arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
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@ -1,558 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre SAS. All rights reserved.
*/
/dts-v1/;
#include "meson-g12a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/meson-g12a-gpio.h>
#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
/ {
compatible = "seirobotics,sei510", "amlogic,g12a";
model = "SEI Robotics SEI510";
adc_keys {
compatible = "adc-keys";
io-channels = <&saradc 0>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
button-onoff {
label = "On/Off";
linux,code = <KEY_POWER>;
press-threshold-microvolt = <1700000>;
};
};
aliases {
serial0 = &uart_AO;
ethernet0 = &ethmac;
};
mono_dac: audio-codec-0 {
compatible = "maxim,max98357a";
#sound-dai-cells = <0>;
sound-name-prefix = "U16";
sdmode-gpios = <&gpio GPIOX_8 GPIO_ACTIVE_HIGH>;
};
dmics: audio-codec-1 {
#sound-dai-cells = <0>;
compatible = "dmic-codec";
num-channels = <2>;
wakeup-delay-ms = <50>;
status = "okay";
sound-name-prefix = "MIC";
};
chosen {
stdout-path = "serial0:115200n8";
};
cvbs-connector {
compatible = "composite-video-connector";
port {
cvbs_connector_in: endpoint {
remote-endpoint = <&cvbs_vdac_out>;
};
};
};
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
};
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&hdmi_tx_tmds_out>;
};
};
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x40000000>;
};
ao_5v: regulator-ao_5v {
compatible = "regulator-fixed";
regulator-name = "AO_5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&dc_in>;
regulator-always-on;
};
dc_in: regulator-dc_in {
compatible = "regulator-fixed";
regulator-name = "DC_IN";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
emmc_1v8: regulator-emmc_1v8 {
compatible = "regulator-fixed";
regulator-name = "EMMC_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vddao_3v3>;
regulator-always-on;
};
vddao_3v3: regulator-vddao_3v3 {
compatible = "regulator-fixed";
regulator-name = "VDDAO_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&dc_in>;
regulator-always-on;
};
vddao_3v3_t: regultor-vddao_3v3_t {
compatible = "regulator-fixed";
regulator-name = "VDDAO_3V3_T";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vddao_3v3>;
gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
enable-active-high;
};
vddcpu: regulator-vddcpu {
/*
* SY8120B1ABC DC/DC Regulator.
*/
compatible = "pwm-regulator";
regulator-name = "VDDCPU";
regulator-min-microvolt = <721000>;
regulator-max-microvolt = <1022000>;
pwm-supply = <&dc_in>;
pwms = <&pwm_AO_cd 1 1250 0>;
pwm-dutycycle-range = <100 0>;
regulator-boot-on;
regulator-always-on;
};
vddio_ao1v8: regulator-vddio_ao1v8 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vddao_3v3>;
regulator-always-on;
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
clocks = <&wifi32k>;
clock-names = "ext_clock";
};
wifi32k: wifi32k {
compatible = "pwm-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
};
sound {
compatible = "amlogic,axg-sound-card";
model = "G12A-SEI510";
audio-aux-devs = <&tdmout_a>, <&tdmout_b>,
<&tdmin_a>, <&tdmin_b>;
audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0",
"TDMOUT_A IN 1", "FRDDR_B OUT 0",
"TDMOUT_A IN 2", "FRDDR_C OUT 0",
"TDM_A Playback", "TDMOUT_A OUT",
"TDMOUT_B IN 0", "FRDDR_A OUT 1",
"TDMOUT_B IN 1", "FRDDR_B OUT 1",
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT",
"TODDR_A IN 4", "PDM Capture",
"TODDR_B IN 4", "PDM Capture",
"TODDR_C IN 4", "PDM Capture",
"TDMIN_A IN 0", "TDM_A Capture",
"TDMIN_A IN 3", "TDM_A Loopback",
"TDMIN_B IN 0", "TDM_A Capture",
"TDMIN_B IN 3", "TDM_A Loopback",
"TDMIN_A IN 1", "TDM_B Capture",
"TDMIN_A IN 4", "TDM_B Loopback",
"TDMIN_B IN 1", "TDM_B Capture",
"TDMIN_B IN 4", "TDM_B Loopback",
"TODDR_A IN 0", "TDMIN_A OUT",
"TODDR_B IN 0", "TDMIN_A OUT",
"TODDR_C IN 0", "TDMIN_A OUT",
"TODDR_A IN 1", "TDMIN_B OUT",
"TODDR_B IN 1", "TDMIN_B OUT",
"TODDR_C IN 1", "TDMIN_B OUT";
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clock-parents = <0>, <0>, <0>;
assigned-clock-rates = <294912000>,
<270950400>,
<393216000>;
status = "okay";
dai-link-0 {
sound-dai = <&frddr_a>;
};
dai-link-1 {
sound-dai = <&frddr_b>;
};
dai-link-2 {
sound-dai = <&frddr_c>;
};
dai-link-3 {
sound-dai = <&toddr_a>;
};
dai-link-4 {
sound-dai = <&toddr_b>;
};
dai-link-5 {
sound-dai = <&toddr_c>;
};
/* internal speaker interface */
dai-link-6 {
sound-dai = <&tdmif_a>;
dai-format = "i2s";
dai-tdm-slot-tx-mask-0 = <1 1>;
mclk-fs = <256>;
codec-0 {
sound-dai = <&mono_dac>;
};
codec-1 {
sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
};
};
/* 8ch hdmi interface */
dai-link-7 {
sound-dai = <&tdmif_b>;
dai-format = "i2s";
dai-tdm-slot-tx-mask-0 = <1 1>;
dai-tdm-slot-tx-mask-1 = <1 1>;
dai-tdm-slot-tx-mask-2 = <1 1>;
dai-tdm-slot-tx-mask-3 = <1 1>;
mclk-fs = <256>;
codec {
sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
};
};
/* internal digital mics */
dai-link-8 {
sound-dai = <&pdm>;
codec {
sound-dai = <&dmics>;
};
};
/* hdmi glue */
dai-link-9 {
sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
codec {
sound-dai = <&hdmi_tx>;
};
};
};
};
&arb {
status = "okay";
};
&cec_AO {
pinctrl-0 = <&cec_ao_a_h_pins>;
pinctrl-names = "default";
status = "disabled";
hdmi-phandle = <&hdmi_tx>;
};
&cecb_AO {
pinctrl-0 = <&cec_ao_b_h_pins>;
pinctrl-names = "default";
status = "okay";
hdmi-phandle = <&hdmi_tx>;
};
&clkc_audio {
status = "okay";
};
&cpu0 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu1 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu2 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu3 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cvbs_vdac_port {
cvbs_vdac_out: endpoint {
remote-endpoint = <&cvbs_connector_in>;
};
};
&ethmac {
status = "okay";
phy-handle = <&internal_ephy>;
phy-mode = "rmii";
};
&frddr_a {
status = "okay";
};
&frddr_b {
status = "okay";
};
&frddr_c {
status = "okay";
};
&hdmi_tx {
status = "okay";
pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
pinctrl-names = "default";
};
&hdmi_tx_tmds_port {
hdmi_tx_tmds_out: endpoint {
remote-endpoint = <&hdmi_connector_in>;
};
};
&i2c3 {
status = "okay";
pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
pinctrl-names = "default";
};
&ir {
status = "okay";
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};
&pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
};
&pdm {
pinctrl-0 = <&pdm_din0_z_pins>, <&pdm_din1_z_pins>,
<&pdm_din2_z_pins>, <&pdm_din3_z_pins>,
<&pdm_dclk_z_pins>;
pinctrl-names = "default";
status = "okay";
};
&saradc {
status = "okay";
vref-supply = <&vddio_ao1v8>;
};
/* SDIO */
&sd_emmc_a {
status = "okay";
pinctrl-0 = <&sdio_pins>;
pinctrl-1 = <&sdio_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
#address-cells = <1>;
#size-cells = <0>;
bus-width = <4>;
cap-sd-highspeed;
sd-uhs-sdr50;
max-frequency = <100000000>;
non-removable;
disable-wp;
/* WiFi firmware requires power to be kept while in suspend */
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vddio_ao1v8>;
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
};
};
/* SD card */
&sd_emmc_b {
status = "okay";
pinctrl-0 = <&sdcard_c_pins>;
pinctrl-1 = <&sdcard_clk_gate_c_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <50000000>;
disable-wp;
cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vddao_3v3>;
};
/* eMMC */
&sd_emmc_c {
status = "okay";
pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
pinctrl-1 = <&emmc_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <8>;
cap-mmc-highspeed;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
max-frequency = <200000000>;
non-removable;
disable-wp;
mmc-pwrseq = <&emmc_pwrseq>;
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&emmc_1v8>;
};
&tdmif_a {
pinctrl-0 = <&tdm_a_dout0_pins>, <&tdm_a_fs_pins>, <&tdm_a_sclk_pins>;
pinctrl-names = "default";
status = "okay";
assigned-clocks = <&clkc_audio AUD_CLKID_TDM_SCLK_PAD0>,
<&clkc_audio AUD_CLKID_TDM_LRCLK_PAD0>;
assigned-clock-parents = <&clkc_audio AUD_CLKID_MST_A_SCLK>,
<&clkc_audio AUD_CLKID_MST_A_LRCLK>;
assigned-clock-rates = <0>, <0>;
};
&tdmif_b {
status = "okay";
};
&tdmin_a {
status = "okay";
};
&tdmin_b {
status = "okay";
};
&tdmout_a {
status = "okay";
};
&tdmout_b {
status = "okay";
};
&toddr_a {
status = "okay";
};
&toddr_b {
status = "okay";
};
&toddr_c {
status = "okay";
};
&tohdmitx {
status = "okay";
};
&uart_A {
status = "okay";
pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
pinctrl-names = "default";
uart-has-rtscts;
bluetooth {
compatible = "brcm,bcm43438-bt";
shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
max-speed = <2000000>;
clocks = <&wifi32k>;
clock-names = "lpo";
vbat-supply = <&vddao_3v3>;
vddio-supply = <&vddio_ao1v8>;
};
};
&uart_AO {
status = "okay";
pinctrl-0 = <&uart_ao_a_pins>;
pinctrl-names = "default";
};
&usb {
status = "okay";
dr_mode = "host";
};

308
arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2018 Amlogic, Inc. All rights reserved.
*/
/dts-v1/;
#include "meson-g12a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/gpio/meson-g12a-gpio.h>
/ {
compatible = "amlogic,u200", "amlogic,g12a";
model = "Amlogic Meson G12A U200 Development Board";
aliases {
serial0 = &uart_AO;
ethernet0 = &ethmac;
};
chosen {
stdout-path = "serial0:115200n8";
};
cvbs-connector {
compatible = "composite-video-connector";
port {
cvbs_connector_in: endpoint {
remote-endpoint = <&cvbs_vdac_out>;
};
};
};
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
};
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&hdmi_tx_tmds_out>;
};
};
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x40000000>;
};
flash_1v8: regulator-flash_1v8 {
compatible = "regulator-fixed";
regulator-name = "FLASH_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_3v3>;
regulator-always-on;
};
main_12v: regulator-main_12v {
compatible = "regulator-fixed";
regulator-name = "12V";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
regulator-always-on;
};
usb_pwr_en: regulator-usb_pwr_en {
compatible = "regulator-fixed";
regulator-name = "USB_PWR_EN";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc_5v>;
gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vcc_1v8: regulator-vcc_1v8 {
compatible = "regulator-fixed";
regulator-name = "VCC_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_3v3>;
regulator-always-on;
};
vcc_3v3: regulator-vcc_3v3 {
compatible = "regulator-fixed";
regulator-name = "VCC_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vddao_3v3>;
regulator-always-on;
/* FIXME: actually controlled by VDDCPU_B_EN */
};
vcc_5v: regulator-vcc_5v {
compatible = "regulator-fixed";
regulator-name = "VCC_5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&main_12v>;
gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
enable-active-high;
};
vddao_1v8: regulator-vddao_1v8 {
compatible = "regulator-fixed";
regulator-name = "VDDAO_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vddao_3v3>;
regulator-always-on;
};
vddao_3v3: regulator-vddao_3v3 {
compatible = "regulator-fixed";
regulator-name = "VDDAO_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&main_12v>;
regulator-always-on;
};
vddcpu: regulator-vddcpu {
/*
* MP8756GD Regulator.
*/
compatible = "pwm-regulator";
regulator-name = "VDDCPU";
regulator-min-microvolt = <721000>;
regulator-max-microvolt = <1022000>;
pwm-supply = <&main_12v>;
pwms = <&pwm_AO_cd 1 1250 0>;
pwm-dutycycle-range = <100 0>;
regulator-boot-on;
regulator-always-on;
};
};
&cec_AO {
pinctrl-0 = <&cec_ao_a_h_pins>;
pinctrl-names = "default";
status = "disabled";
hdmi-phandle = <&hdmi_tx>;
};
&cecb_AO {
pinctrl-0 = <&cec_ao_b_h_pins>;
pinctrl-names = "default";
status = "okay";
hdmi-phandle = <&hdmi_tx>;
};
&cpu0 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu1 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu2 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu3 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cvbs_vdac_port {
cvbs_vdac_out: endpoint {
remote-endpoint = <&cvbs_connector_in>;
};
};
&ethmac {
status = "okay";
phy-handle = <&internal_ephy>;
phy-mode = "rmii";
};
&hdmi_tx {
status = "okay";
pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
pinctrl-names = "default";
hdmi-supply = <&vcc_5v>;
};
&hdmi_tx_tmds_port {
hdmi_tx_tmds_out: endpoint {
remote-endpoint = <&hdmi_connector_in>;
};
};
&ir {
status = "okay";
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
};
/* i2c Touch */
&i2c0 {
status = "okay";
pinctrl-0 = <&i2c0_sda_z0_pins>, <&i2c0_sck_z1_pins>;
pinctrl-names = "default";
};
/* i2c CM */
&i2c2 {
status = "okay";
pinctrl-0 = <&i2c2_sda_z_pins>, <&i2c2_sck_z_pins>;
pinctrl-names = "default";
};
/* i2c Audio */
&i2c3 {
status = "okay";
pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
pinctrl-names = "default";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};
/* SD card */
&sd_emmc_b {
status = "okay";
pinctrl-0 = <&sdcard_c_pins>;
pinctrl-1 = <&sdcard_clk_gate_c_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <50000000>;
disable-wp;
cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vddao_3v3>;
};
/* eMMC */
&sd_emmc_c {
status = "okay";
pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
pinctrl-1 = <&emmc_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <8>;
cap-mmc-highspeed;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
max-frequency = <200000000>;
non-removable;
disable-wp;
mmc-pwrseq = <&emmc_pwrseq>;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&flash_1v8>;
};
&uart_AO {
status = "okay";
pinctrl-0 = <&uart_ao_a_pins>;
pinctrl-names = "default";
};
&usb {
status = "okay";
vbus-supply = <&usb_pwr_en>;
};
&usb2_phy0 {
phy-supply = <&vcc_5v>;
};
&usb2_phy1 {
phy-supply = <&vcc_5v>;
};

481
arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2018 BayLibre SAS. All rights reserved.
*/
/dts-v1/;
#include "meson-g12a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/gpio/meson-g12a-gpio.h>
#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
/ {
compatible = "amediatech,x96-max", "amlogic,g12a";
model = "Shenzhen Amediatech Technology Co., Ltd X96 Max";
aliases {
serial0 = &uart_AO;
ethernet0 = &ethmac;
};
spdif_dit: audio-codec-1 {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dit";
status = "okay";
sound-name-prefix = "DIT";
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x40000000>;
};
cvbs-connector {
compatible = "composite-video-connector";
port {
cvbs_connector_in: endpoint {
remote-endpoint = <&cvbs_vdac_out>;
};
};
};
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&hdmi_tx_tmds_out>;
};
};
};
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
clocks = <&wifi32k>;
clock-names = "ext_clock";
};
flash_1v8: regulator-flash_1v8 {
compatible = "regulator-fixed";
regulator-name = "FLASH_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_3v3>;
regulator-always-on;
};
dc_in: regulator-dc_in {
compatible = "regulator-fixed";
regulator-name = "DC_IN";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
vcc_1v8: regulator-vcc_1v8 {
compatible = "regulator-fixed";
regulator-name = "VCC_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_3v3>;
regulator-always-on;
};
vcc_3v3: regulator-vcc_3v3 {
compatible = "regulator-fixed";
regulator-name = "VCC_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vddao_3v3>;
regulator-always-on;
/* FIXME: actually controlled by VDDCPU_B_EN */
};
vcc_5v: regulator-vcc_5v {
compatible = "regulator-fixed";
regulator-name = "VCC_5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&dc_in>;
gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
enable-active-low;
};
vddao_1v8: regulator-vddao_1v8 {
compatible = "regulator-fixed";
regulator-name = "VDDAO_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vddao_3v3>;
regulator-always-on;
};
vddao_3v3: regulator-vddao_3v3 {
compatible = "regulator-fixed";
regulator-name = "VDDAO_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&dc_in>;
regulator-always-on;
};
vddcpu: regulator-vddcpu {
compatible = "pwm-regulator";
regulator-name = "VDDCPU";
regulator-min-microvolt = <721000>;
regulator-max-microvolt = <1022000>;
pwm-supply = <&dc_in>;
pwms = <&pwm_AO_cd 1 1250 0>;
pwm-dutycycle-range = <100 0>;
regulator-boot-on;
regulator-always-on;
};
sound {
compatible = "amlogic,axg-sound-card";
model = "G12A-X96-MAX";
audio-aux-devs = <&tdmout_b>;
audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
"TDMOUT_B IN 1", "FRDDR_B OUT 1",
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT",
"SPDIFOUT IN 0", "FRDDR_A OUT 3",
"SPDIFOUT IN 1", "FRDDR_B OUT 3",
"SPDIFOUT IN 2", "FRDDR_C OUT 3";
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clock-parents = <0>, <0>, <0>;
assigned-clock-rates = <294912000>,
<270950400>,
<393216000>;
status = "okay";
dai-link-0 {
sound-dai = <&frddr_a>;
};
dai-link-1 {
sound-dai = <&frddr_b>;
};
dai-link-2 {
sound-dai = <&frddr_c>;
};
/* 8ch hdmi interface */
dai-link-3 {
sound-dai = <&tdmif_b>;
dai-format = "i2s";
dai-tdm-slot-tx-mask-0 = <1 1>;
dai-tdm-slot-tx-mask-1 = <1 1>;
dai-tdm-slot-tx-mask-2 = <1 1>;
dai-tdm-slot-tx-mask-3 = <1 1>;
mclk-fs = <256>;
codec {
sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
};
};
/* spdif hdmi or toslink interface */
dai-link-4 {
sound-dai = <&spdifout>;
codec-0 {
sound-dai = <&spdif_dit>;
};
codec-1 {
sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>;
};
};
/* spdif hdmi interface */
dai-link-5 {
sound-dai = <&spdifout_b>;
codec {
sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>;
};
};
/* hdmi glue */
dai-link-6 {
sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
codec {
sound-dai = <&hdmi_tx>;
};
};
};
wifi32k: wifi32k {
compatible = "pwm-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
};
};
&arb {
status = "okay";
};
&cec_AO {
pinctrl-0 = <&cec_ao_a_h_pins>;
pinctrl-names = "default";
status = "disabled";
hdmi-phandle = <&hdmi_tx>;
};
&cecb_AO {
pinctrl-0 = <&cec_ao_b_h_pins>;
pinctrl-names = "default";
status = "okay";
hdmi-phandle = <&hdmi_tx>;
};
&clkc_audio {
status = "okay";
};
&cpu0 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu1 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu2 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu3 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cvbs_vdac_port {
cvbs_vdac_out: endpoint {
remote-endpoint = <&cvbs_connector_in>;
};
};
&frddr_a {
status = "okay";
};
&frddr_b {
status = "okay";
};
&frddr_c {
status = "okay";
};
&hdmi_tx {
status = "okay";
pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
pinctrl-names = "default";
hdmi-supply = <&vcc_5v>;
};
&hdmi_tx_tmds_port {
hdmi_tx_tmds_out: endpoint {
remote-endpoint = <&hdmi_connector_in>;
};
};
&ir {
status = "okay";
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
linux,rc-map-name = "rc-x96max";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};
&ext_mdio {
external_phy: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
reg = <0>;
max-speed = <1000>;
eee-broken-1000t;
reset-assert-us = <10000>;
reset-deassert-us = <80000>;
reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
interrupt-parent = <&gpio_intc>;
/* MAC_INTR on GPIOZ_14 */
interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
};
};
&ethmac {
pinctrl-0 = <&eth_pins>, <&eth_rgmii_pins>;
pinctrl-names = "default";
status = "okay";
phy-mode = "rgmii";
phy-handle = <&external_phy>;
amlogic,tx-delay-ns = <2>;
};
&pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
};
&uart_A {
status = "okay";
pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
pinctrl-names = "default";
uart-has-rtscts;
bluetooth {
compatible = "brcm,bcm43438-bt";
shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
max-speed = <2000000>;
clocks = <&wifi32k>;
clock-names = "lpo";
};
};
&uart_AO {
status = "okay";
pinctrl-0 = <&uart_ao_a_pins>;
pinctrl-names = "default";
};
&usb {
status = "okay";
dr_mode = "host";
};
/* SDIO */
&sd_emmc_a {
status = "okay";
pinctrl-0 = <&sdio_pins>;
pinctrl-1 = <&sdio_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
#address-cells = <1>;
#size-cells = <0>;
bus-width = <4>;
cap-sd-highspeed;
sd-uhs-sdr50;
max-frequency = <100000000>;
non-removable;
disable-wp;
/* WiFi firmware requires power to be kept while in suspend */
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vddao_1v8>;
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
};
};
/* SD card */
&sd_emmc_b {
status = "okay";
pinctrl-0 = <&sdcard_c_pins>;
pinctrl-1 = <&sdcard_clk_gate_c_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <100000000>;
disable-wp;
cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vddao_3v3>;
};
/* eMMC */
&sd_emmc_c {
status = "okay";
pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
pinctrl-1 = <&emmc_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <8>;
cap-mmc-highspeed;
max-frequency = <100000000>;
non-removable;
disable-wp;
mmc-pwrseq = <&emmc_pwrseq>;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&flash_1v8>;
};
&spdifout {
pinctrl-0 = <&spdif_out_h_pins>;
pinctrl-names = "default";
status = "okay";
};
&spdifout_b {
status = "okay";
};
&tdmif_b {
status = "okay";
};
&tdmout_b {
status = "okay";
};
&tohdmitx {
status = "okay";
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2018 Amlogic, Inc. All rights reserved.
*/
#include "meson-g12.dtsi"
/ {
compatible = "amlogic,g12a";
cpus {
#address-cells = <0x2>;
#size-cells = <0x0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x0>;
enable-method = "psci";
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x1>;
enable-method = "psci";
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x2>;
enable-method = "psci";
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x3>;
enable-method = "psci";
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
l2: l2-cache0 {
compatible = "cache";
};
};
cpu_opp_table: opp-table {
compatible = "operating-points-v2";
opp-shared;
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
opp-microvolt = <731000>;
};
opp-250000000 {
opp-hz = /bits/ 64 <250000000>;
opp-microvolt = <731000>;
};
opp-500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <731000>;
};
opp-667000000 {
opp-hz = /bits/ 64 <666666666>;
opp-microvolt = <731000>;
};
opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <731000>;
};
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <731000>;
};
opp-1398000000 {
opp-hz = /bits/ 64 <1398000000>;
opp-microvolt = <761000>;
};
opp-1512000000 {
opp-hz = /bits/ 64 <1512000000>;
opp-microvolt = <791000>;
};
opp-1608000000 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <831000>;
};
opp-1704000000 {
opp-hz = /bits/ 64 <1704000000>;
opp-microvolt = <861000>;
};
opp-1800000000 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <981000>;
};
};
};
&cpu_thermal {
cooling-maps {
map0 {
trip = <&cpu_passive>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cpu_hot>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};

41
arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre, SAS
* Author: Neil Armstrong <narmstrong@baylibre.com>
* Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
*/
/dts-v1/;
#include "meson-g12b-a311d.dtsi"
#include "meson-khadas-vim3.dtsi"
#include "meson-g12b-khadas-vim3.dtsi"
/ {
compatible = "khadas,vim3", "amlogic,a311d", "amlogic,g12b";
};
/*
* The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
* lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
* an USB3.0 Type A connector and a M.2 Key M slot.
* The PHY driving these differential lines is shared between
* the USB3.0 controller and the PCIe Controller, thus only
* a single controller can use it.
* If the MCU is configured to mux the PCIe/USB3.0 differential lines
* to the M.2 Key M slot, uncomment the following block to disable
* USB3.0 from the USB Complex and enable the PCIe controller.
* The End User is not expected to uncomment the following except for
* testing purposes, but instead rely on the firmware/bootloader to
* update these nodes accordingly if PCIe mode is selected by the MCU.
*/
/*
&pcie {
status = "okay";
};
&usb {
phys = <&usb2_phy0>, <&usb2_phy1>;
phy-names = "usb2-phy0", "usb2-phy1";
};
*/

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arch/arm64/boot/dts/amlogic/meson-g12b-a311d.dtsi
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre, SAS
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
#include "meson-g12b.dtsi"
/ {
cpu_opp_table_0: opp-table-0 {
compatible = "operating-points-v2";
opp-shared;
opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <761000>;
};
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <781000>;
};
opp-1398000000 {
opp-hz = /bits/ 64 <1398000000>;
opp-microvolt = <811000>;
};
opp-1512000000 {
opp-hz = /bits/ 64 <1512000000>;
opp-microvolt = <861000>;
};
opp-1608000000 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <901000>;
};
opp-1704000000 {
opp-hz = /bits/ 64 <1704000000>;
opp-microvolt = <951000>;
};
opp-1800000000 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1001000>;
};
};
cpub_opp_table_1: opp-table-1 {
compatible = "operating-points-v2";
opp-shared;
opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <731000>;
};
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <751000>;
};
opp-1398000000 {
opp-hz = /bits/ 64 <1398000000>;
opp-microvolt = <771000>;
};
opp-1512000000 {
opp-hz = /bits/ 64 <1512000000>;
opp-microvolt = <771000>;
};
opp-1608000000 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <781000>;
};
opp-1704000000 {
opp-hz = /bits/ 64 <1704000000>;
opp-microvolt = <791000>;
};
opp-1800000000 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <831000>;
};
opp-1908000000 {
opp-hz = /bits/ 64 <1908000000>;
opp-microvolt = <861000>;
};
opp-2016000000 {
opp-hz = /bits/ 64 <2016000000>;
opp-microvolt = <911000>;
};
opp-2108000000 {
opp-hz = /bits/ 64 <2108000000>;
opp-microvolt = <951000>;
};
opp-2208000000 {
opp-hz = /bits/ 64 <2208000000>;
opp-microvolt = <1011000>;
};
};
};

125
arch/arm64/boot/dts/amlogic/meson-g12b-gtking-pro.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre, SAS
* Author: Neil Armstrong <narmstrong@baylibre.com>
* Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
*/
/dts-v1/;
#include "meson-g12b-w400.dtsi"
#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
/ {
compatible = "azw,gtking", "amlogic,g12b";
model = "Beelink GT-King Pro";
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <100>;
power-button {
label = "power";
linux,code = <KEY_POWER>;
gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
};
};
leds {
compatible = "gpio-leds";
white {
label = "power:white";
gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
};
sound {
compatible = "amlogic,axg-sound-card";
model = "G12B-GTKING-PRO";
audio-aux-devs = <&tdmout_b>;
audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
"TDMOUT_B IN 1", "FRDDR_B OUT 1",
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clock-parents = <0>, <0>, <0>;
assigned-clock-rates = <294912000>,
<270950400>,
<393216000>;
status = "okay";
dai-link-0 {
sound-dai = <&frddr_a>;
};
dai-link-1 {
sound-dai = <&frddr_b>;
};
dai-link-2 {
sound-dai = <&frddr_c>;
};
/* 8ch hdmi interface */
dai-link-3 {
sound-dai = <&tdmif_b>;
dai-format = "i2s";
dai-tdm-slot-tx-mask-0 = <1 1>;
dai-tdm-slot-tx-mask-1 = <1 1>;
dai-tdm-slot-tx-mask-2 = <1 1>;
dai-tdm-slot-tx-mask-3 = <1 1>;
mclk-fs = <256>;
codec {
sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
};
};
dai-link-4 {
sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
codec {
sound-dai = <&hdmi_tx>;
};
};
};
};
&arb {
status = "okay";
};
&clkc_audio {
status = "okay";
};
&frddr_a {
status = "okay";
};
&frddr_b {
status = "okay";
};
&frddr_c {
status = "okay";
};
&tdmif_b {
status = "okay";
};
&tdmout_b {
status = "okay";
};
&tohdmitx {
status = "okay";
};

145
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre, SAS
* Author: Neil Armstrong <narmstrong@baylibre.com>
* Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
*/
/dts-v1/;
#include "meson-g12b-w400.dtsi"
#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
/ {
compatible = "azw,gtking", "amlogic,g12b";
model = "Beelink GT-King";
spdif_dit: audio-codec-1 {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dit";
status = "okay";
sound-name-prefix = "DIT";
};
sound {
compatible = "amlogic,axg-sound-card";
model = "G12B-GTKING";
audio-aux-devs = <&tdmout_b>;
audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
"TDMOUT_B IN 1", "FRDDR_B OUT 1",
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT",
"SPDIFOUT IN 0", "FRDDR_A OUT 3",
"SPDIFOUT IN 1", "FRDDR_B OUT 3",
"SPDIFOUT IN 2", "FRDDR_C OUT 3";
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clock-parents = <0>, <0>, <0>;
assigned-clock-rates = <294912000>,
<270950400>,
<393216000>;
status = "okay";
dai-link-0 {
sound-dai = <&frddr_a>;
};
dai-link-1 {
sound-dai = <&frddr_b>;
};
dai-link-2 {
sound-dai = <&frddr_c>;
};
/* 8ch hdmi interface */
dai-link-3 {
sound-dai = <&tdmif_b>;
dai-format = "i2s";
dai-tdm-slot-tx-mask-0 = <1 1>;
dai-tdm-slot-tx-mask-1 = <1 1>;
dai-tdm-slot-tx-mask-2 = <1 1>;
dai-tdm-slot-tx-mask-3 = <1 1>;
mclk-fs = <256>;
codec {
sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
};
};
/* spdif hdmi or toslink interface */
dai-link-4 {
sound-dai = <&spdifout>;
codec-0 {
sound-dai = <&spdif_dit>;
};
codec-1 {
sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>;
};
};
/* spdif hdmi interface */
dai-link-5 {
sound-dai = <&spdifout_b>;
codec {
sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>;
};
};
/* hdmi glue */
dai-link-6 {
sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
codec {
sound-dai = <&hdmi_tx>;
};
};
};
};
&arb {
status = "okay";
};
&clkc_audio {
status = "okay";
};
&frddr_a {
status = "okay";
};
&frddr_b {
status = "okay";
};
&frddr_c {
status = "okay";
};
&spdifout {
pinctrl-0 = <&spdif_out_h_pins>;
pinctrl-names = "default";
status = "okay";
};
&spdifout_b {
status = "okay";
};
&tdmif_b {
status = "okay";
};
&tdmout_b {
status = "okay";
};
&tohdmitx {
status = "okay";
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre, SAS
* Author: Neil Armstrong <narmstrong@baylibre.com>
* Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
*/
/ {
model = "Khadas VIM3";
vddcpu_a: regulator-vddcpu-a {
/*
* MP8756GD Regulator.
*/
compatible = "pwm-regulator";
regulator-name = "VDDCPU_A";
regulator-min-microvolt = <690000>;
regulator-max-microvolt = <1050000>;
pwm-supply = <&dc_in>;
pwms = <&pwm_ab 0 1250 0>;
pwm-dutycycle-range = <100 0>;
regulator-boot-on;
regulator-always-on;
};
vddcpu_b: regulator-vddcpu-b {
/*
* Silergy SY8030DEC Regulator.
*/
compatible = "pwm-regulator";
regulator-name = "VDDCPU_B";
regulator-min-microvolt = <690000>;
regulator-max-microvolt = <1050000>;
pwm-supply = <&vsys_3v3>;
pwms = <&pwm_AO_cd 1 1250 0>;
pwm-dutycycle-range = <100 0>;
regulator-boot-on;
regulator-always-on;
};
};
&cpu0 {
cpu-supply = <&vddcpu_b>;
operating-points-v2 = <&cpu_opp_table_0>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu1 {
cpu-supply = <&vddcpu_b>;
operating-points-v2 = <&cpu_opp_table_0>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu100 {
cpu-supply = <&vddcpu_a>;
operating-points-v2 = <&cpub_opp_table_1>;
clocks = <&clkc CLKID_CPUB_CLK>;
clock-latency = <50000>;
};
&cpu101 {
cpu-supply = <&vddcpu_a>;
operating-points-v2 = <&cpub_opp_table_1>;
clocks = <&clkc CLKID_CPUB_CLK>;
clock-latency = <50000>;
};
&cpu102 {
cpu-supply = <&vddcpu_a>;
operating-points-v2 = <&cpub_opp_table_1>;
clocks = <&clkc CLKID_CPUB_CLK>;
clock-latency = <50000>;
};
&cpu103 {
cpu-supply = <&vddcpu_a>;
operating-points-v2 = <&cpub_opp_table_1>;
clocks = <&clkc CLKID_CPUB_CLK>;
clock-latency = <50000>;
};
&pwm_ab {
pinctrl-0 = <&pwm_a_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
status = "okay";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};

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arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2-plus.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre, SAS
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
/dts-v1/;
/* The Amlogic S922X Rev. C supports the same OPPs as the A311D variant */
#include "meson-g12b-a311d.dtsi"
#include "meson-g12b-odroid-n2.dtsi"
/ {
compatible = "hardkernel,odroid-n2-plus", "amlogic,s922x", "amlogic,g12b";
model = "Hardkernel ODROID-N2Plus";
};
&vddcpu_a {
regulator-min-microvolt = <680000>;
regulator-max-microvolt = <1040000>;
pwms = <&pwm_ab 0 1500 0>;
};
&vddcpu_b {
regulator-min-microvolt = <680000>;
regulator-max-microvolt = <1040000>;
pwms = <&pwm_AO_cd 1 1500 0>;
};

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arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre, SAS
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
/dts-v1/;
#include "meson-g12b-s922x.dtsi"
#include "meson-g12b-odroid-n2.dtsi"
/ {
compatible = "hardkernel,odroid-n2", "amlogic,s922x", "amlogic,g12b";
model = "Hardkernel ODROID-N2";
};

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arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre, SAS
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/meson-g12a-gpio.h>
#include <dt-bindings/sound/meson-g12a-toacodec.h>
#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
/ {
aliases {
serial0 = &uart_AO;
ethernet0 = &ethmac;
};
dio2133: audio-amplifier-0 {
compatible = "simple-audio-amplifier";
enable-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
VCC-supply = <&vcc_5v>;
sound-name-prefix = "U19";
status = "okay";
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x40000000>;
};
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
};
leds {
compatible = "gpio-leds";
blue {
label = "n2:blue";
gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
tflash_vdd: regulator-tflash_vdd {
compatible = "regulator-fixed";
regulator-name = "TFLASH_VDD";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio_ao GPIOAO_8 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
};
tf_io: gpio-regulator-tf_io {
compatible = "regulator-gpio";
regulator-name = "TF_IO";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>;
gpios-states = <0>;
states = <3300000 0>,
<1800000 1>;
};
flash_1v8: regulator-flash_1v8 {
compatible = "regulator-fixed";
regulator-name = "FLASH_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_3v3>;
regulator-always-on;
};
main_12v: regulator-main_12v {
compatible = "regulator-fixed";
regulator-name = "12V";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
regulator-always-on;
};
vcc_5v: regulator-vcc_5v {
compatible = "regulator-fixed";
regulator-name = "5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
vin-supply = <&main_12v>;
};
vcc_1v8: regulator-vcc_1v8 {
compatible = "regulator-fixed";
regulator-name = "VCC_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_3v3>;
regulator-always-on;
};
vcc_3v3: regulator-vcc_3v3 {
compatible = "regulator-fixed";
regulator-name = "VCC_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vddao_3v3>;
regulator-always-on;
/* FIXME: actually controlled by VDDCPU_B_EN */
};
vddcpu_a: regulator-vddcpu-a {
/*
* MP8756GD Regulator.
*/
compatible = "pwm-regulator";
regulator-name = "VDDCPU_A";
regulator-min-microvolt = <721000>;
regulator-max-microvolt = <1022000>;
pwm-supply = <&main_12v>;
pwms = <&pwm_ab 0 1250 0>;
pwm-dutycycle-range = <100 0>;
regulator-boot-on;
regulator-always-on;
};
vddcpu_b: regulator-vddcpu-b {
/*
* Silergy SY8120B1ABC Regulator.
*/
compatible = "pwm-regulator";
regulator-name = "VDDCPU_B";
regulator-min-microvolt = <721000>;
regulator-max-microvolt = <1022000>;
pwm-supply = <&main_12v>;
pwms = <&pwm_AO_cd 1 1250 0>;
pwm-dutycycle-range = <100 0>;
regulator-boot-on;
regulator-always-on;
};
hub_5v: regulator-hub_5v {
compatible = "regulator-fixed";
regulator-name = "HUB_5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc_5v>;
/* Connected to the Hub CHIPENABLE, LOW sets low power state */
gpio = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
usb_pwr_en: regulator-usb_pwr_en {
compatible = "regulator-fixed";
regulator-name = "USB_PWR_EN";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc_5v>;
/* Connected to the microUSB port power enable */
gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vddao_1v8: regulator-vddao_1v8 {
compatible = "regulator-fixed";
regulator-name = "VDDAO_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vddao_3v3>;
regulator-always-on;
};
vddao_3v3: regulator-vddao_3v3 {
compatible = "regulator-fixed";
regulator-name = "VDDAO_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&main_12v>;
regulator-always-on;
};
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&hdmi_tx_tmds_out>;
};
};
};
sound {
compatible = "amlogic,axg-sound-card";
model = "G12B-ODROID-N2";
audio-widgets = "Line", "Lineout";
audio-aux-devs = <&tdmout_b>, <&tdmout_c>, <&tdmin_a>,
<&tdmin_b>, <&tdmin_c>, <&tdmin_lb>,
<&dio2133>;
audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
"TDMOUT_B IN 1", "FRDDR_B OUT 1",
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT",
"TDMOUT_C IN 0", "FRDDR_A OUT 2",
"TDMOUT_C IN 1", "FRDDR_B OUT 2",
"TDMOUT_C IN 2", "FRDDR_C OUT 2",
"TDM_C Playback", "TDMOUT_C OUT",
"TDMIN_A IN 4", "TDM_B Loopback",
"TDMIN_B IN 4", "TDM_B Loopback",
"TDMIN_C IN 4", "TDM_B Loopback",
"TDMIN_LB IN 1", "TDM_B Loopback",
"TDMIN_A IN 5", "TDM_C Loopback",
"TDMIN_B IN 5", "TDM_C Loopback",
"TDMIN_C IN 5", "TDM_C Loopback",
"TDMIN_LB IN 2", "TDM_C Loopback",
"TODDR_A IN 0", "TDMIN_A OUT",
"TODDR_B IN 0", "TDMIN_A OUT",
"TODDR_C IN 0", "TDMIN_A OUT",
"TODDR_A IN 1", "TDMIN_B OUT",
"TODDR_B IN 1", "TDMIN_B OUT",
"TODDR_C IN 1", "TDMIN_B OUT",
"TODDR_A IN 2", "TDMIN_C OUT",
"TODDR_B IN 2", "TDMIN_C OUT",
"TODDR_C IN 2", "TDMIN_C OUT",
"TODDR_A IN 6", "TDMIN_LB OUT",
"TODDR_B IN 6", "TDMIN_LB OUT",
"TODDR_C IN 6", "TDMIN_LB OUT",
"U19 INL", "ACODEC LOLP",
"U19 INR", "ACODEC LORP",
"Lineout", "U19 OUTL",
"Lineout", "U19 OUTR";
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clock-parents = <0>, <0>, <0>;
assigned-clock-rates = <294912000>,
<270950400>,
<393216000>;
status = "okay";
dai-link-0 {
sound-dai = <&frddr_a>;
};
dai-link-1 {
sound-dai = <&frddr_b>;
};
dai-link-2 {
sound-dai = <&frddr_c>;
};
dai-link-3 {
sound-dai = <&toddr_a>;
};
dai-link-4 {
sound-dai = <&toddr_b>;
};
dai-link-5 {
sound-dai = <&toddr_c>;
};
/* 8ch hdmi interface */
dai-link-6 {
sound-dai = <&tdmif_b>;
dai-format = "i2s";
dai-tdm-slot-tx-mask-0 = <1 1>;
dai-tdm-slot-tx-mask-1 = <1 1>;
dai-tdm-slot-tx-mask-2 = <1 1>;
dai-tdm-slot-tx-mask-3 = <1 1>;
mclk-fs = <256>;
codec-0 {
sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
};
codec-1 {
sound-dai = <&toacodec TOACODEC_IN_B>;
};
};
/* i2s jack output interface */
dai-link-7 {
sound-dai = <&tdmif_c>;
dai-format = "i2s";
dai-tdm-slot-tx-mask-0 = <1 1>;
mclk-fs = <256>;
codec-0 {
sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>;
};
codec-1 {
sound-dai = <&toacodec TOACODEC_IN_C>;
};
};
/* hdmi glue */
dai-link-8 {
sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
codec {
sound-dai = <&hdmi_tx>;
};
};
/* acodec glue */
dai-link-9 {
sound-dai = <&toacodec TOACODEC_OUT>;
codec {
sound-dai = <&acodec>;
};
};
};
};
&acodec {
AVDD-supply = <&vddao_1v8>;
status = "okay";
};
&arb {
status = "okay";
};
&cec_AO {
pinctrl-0 = <&cec_ao_a_h_pins>;
pinctrl-names = "default";
status = "disabled";
hdmi-phandle = <&hdmi_tx>;
};
&cecb_AO {
pinctrl-0 = <&cec_ao_b_h_pins>;
pinctrl-names = "default";
status = "okay";
hdmi-phandle = <&hdmi_tx>;
};
&clkc_audio {
status = "okay";
};
&cpu0 {
cpu-supply = <&vddcpu_b>;
operating-points-v2 = <&cpu_opp_table_0>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu1 {
cpu-supply = <&vddcpu_b>;
operating-points-v2 = <&cpu_opp_table_0>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu100 {
cpu-supply = <&vddcpu_a>;
operating-points-v2 = <&cpub_opp_table_1>;
clocks = <&clkc CLKID_CPUB_CLK>;
clock-latency = <50000>;
};
&cpu101 {
cpu-supply = <&vddcpu_a>;
operating-points-v2 = <&cpub_opp_table_1>;
clocks = <&clkc CLKID_CPUB_CLK>;
clock-latency = <50000>;
};
&cpu102 {
cpu-supply = <&vddcpu_a>;
operating-points-v2 = <&cpub_opp_table_1>;
clocks = <&clkc CLKID_CPUB_CLK>;
clock-latency = <50000>;
};
&cpu103 {
cpu-supply = <&vddcpu_a>;
operating-points-v2 = <&cpub_opp_table_1>;
clocks = <&clkc CLKID_CPUB_CLK>;
clock-latency = <50000>;
};
&ext_mdio {
external_phy: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
reg = <0>;
max-speed = <1000>;
reset-assert-us = <10000>;
reset-deassert-us = <80000>;
reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
interrupt-parent = <&gpio_intc>;
/* MAC_INTR on GPIOZ_14 */
interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
};
};
&ethmac {
pinctrl-0 = <&eth_pins>, <&eth_rgmii_pins>;
pinctrl-names = "default";
status = "okay";
phy-mode = "rgmii";
phy-handle = <&external_phy>;
amlogic,tx-delay-ns = <2>;
};
&frddr_a {
status = "okay";
};
&frddr_b {
status = "okay";
};
&frddr_c {
status = "okay";
};
&gpio {
/*
* WARNING: The USB Hub on the Odroid-N2 needs a reset signal
* to be turned high in order to be detected by the USB Controller
* This signal should be handled by a USB specific power sequence
* in order to reset the Hub when USB bus is powered down.
*/
usb-hub {
gpio-hog;
gpios = <GPIOH_4 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "usb-hub-reset";
};
};
&hdmi_tx {
status = "okay";
pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
pinctrl-names = "default";
hdmi-supply = <&vcc_5v>;
};
&hdmi_tx_tmds_port {
hdmi_tx_tmds_out: endpoint {
remote-endpoint = <&hdmi_connector_in>;
};
};
&ir {
status = "okay";
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
linux,rc-map-name = "rc-odroid";
};
&pwm_ab {
pinctrl-0 = <&pwm_a_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
status = "okay";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};
/* SD card */
&sd_emmc_b {
status = "okay";
pinctrl-0 = <&sdcard_c_pins>;
pinctrl-1 = <&sdcard_clk_gate_c_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <50000000>;
disable-wp;
cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&tflash_vdd>;
vqmmc-supply = <&tf_io>;
};
/* eMMC */
&sd_emmc_c {
status = "okay";
pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
pinctrl-1 = <&emmc_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <8>;
cap-mmc-highspeed;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
max-frequency = <200000000>;
disable-wp;
mmc-pwrseq = <&emmc_pwrseq>;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&flash_1v8>;
};
/*
* EMMC_D4, EMMC_D5, EMMC_D6 and EMMC_D7 pins are shared between SPI NOR pins
* and eMMC Data 4 to 7 pins.
* Replace emmc_data_8b_pins to emmc_data_4b_pins from sd_emmc_c pinctrl-0,
* and change bus-width to 4 then spifc can be enabled.
* The SW1 slide should also be set to the correct position.
*/
&spifc {
status = "disabled";
pinctrl-0 = <&nor_pins>;
pinctrl-names = "default";
mx25u64: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "mxicy,mx25u6435f", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <104000000>;
};
};
&tdmif_b {
status = "okay";
};
&tdmif_c {
status = "okay";
};
&tdmin_a {
status = "okay";
};
&tdmin_b {
status = "okay";
};
&tdmin_c {
status = "okay";
};
&tdmin_lb {
status = "okay";
};
&tdmout_b {
status = "okay";
};
&tdmout_c {
status = "okay";
};
&toacodec {
status = "okay";
};
&tohdmitx {
status = "okay";
};
&toddr_a {
status = "okay";
};
&toddr_b {
status = "okay";
};
&toddr_c {
status = "okay";
};
&uart_AO {
status = "okay";
pinctrl-0 = <&uart_ao_a_pins>;
pinctrl-names = "default";
};
&usb {
status = "okay";
vbus-supply = <&usb_pwr_en>;
};
&usb2_phy0 {
phy-supply = <&vcc_5v>;
};
&usb2_phy1 {
/* Enable the hub which is connected to this port */
phy-supply = <&hub_5v>;
};

41
arch/arm64/boot/dts/amlogic/meson-g12b-s922x-khadas-vim3.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre, SAS
* Author: Neil Armstrong <narmstrong@baylibre.com>
* Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
*/
/dts-v1/;
#include "meson-g12b-s922x.dtsi"
#include "meson-khadas-vim3.dtsi"
#include "meson-g12b-khadas-vim3.dtsi"
/ {
compatible = "khadas,vim3", "amlogic,s922x", "amlogic,g12b";
};
/*
* The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
* lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
* an USB3.0 Type A connector and a M.2 Key M slot.
* The PHY driving these differential lines is shared between
* the USB3.0 controller and the PCIe Controller, thus only
* a single controller can use it.
* If the MCU is configured to mux the PCIe/USB3.0 differential lines
* to the M.2 Key M slot, uncomment the following block to disable
* USB3.0 from the USB Complex and enable the PCIe controller.
* The End User is not expected to uncomment the following except for
* testing purposes, but instead rely on the firmware/bootloader to
* update these nodes accordingly if PCIe mode is selected by the MCU.
*/
/*
&pcie {
status = "okay";
};
&usb {
phys = <&usb2_phy0>, <&usb2_phy1>;
phy-names = "usb2-phy0", "usb2-phy1";
};
*/

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arch/arm64/boot/dts/amlogic/meson-g12b-s922x.dtsi
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@ -1,99 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre, SAS
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
#include "meson-g12b.dtsi"
/ {
cpu_opp_table_0: opp-table-0 {
compatible = "operating-points-v2";
opp-shared;
opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <731000>;
};
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <731000>;
};
opp-1398000000 {
opp-hz = /bits/ 64 <1398000000>;
opp-microvolt = <761000>;
};
opp-1512000000 {
opp-hz = /bits/ 64 <1512000000>;
opp-microvolt = <791000>;
};
opp-1608000000 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <831000>;
};
opp-1704000000 {
opp-hz = /bits/ 64 <1704000000>;
opp-microvolt = <861000>;
};
opp-1896000000 {
opp-hz = /bits/ 64 <1896000000>;
opp-microvolt = <981000>;
};
opp-1992000000 {
opp-hz = /bits/ 64 <1992000000>;
opp-microvolt = <1001000>;
};
};
cpub_opp_table_1: opp-table-1 {
compatible = "operating-points-v2";
opp-shared;
opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <771000>;
};
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <771000>;
};
opp-1398000000 {
opp-hz = /bits/ 64 <1398000000>;
opp-microvolt = <791000>;
};
opp-1512000000 {
opp-hz = /bits/ 64 <1512000000>;
opp-microvolt = <821000>;
};
opp-1608000000 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <861000>;
};
opp-1704000000 {
opp-hz = /bits/ 64 <1704000000>;
opp-microvolt = <891000>;
};
opp-1800000000 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <981000>;
};
opp-1908000000 {
opp-hz = /bits/ 64 <1908000000>;
opp-microvolt = <1022000>;
};
};
};

184
arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre, SAS
* Author: Neil Armstrong <narmstrong@baylibre.com>
* Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
*/
/dts-v1/;
#include "meson-g12b-w400.dtsi"
#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
/ {
compatible = "ugoos,am6", "amlogic,s922x", "amlogic,g12b";
model = "Ugoos AM6";
spdif_dit: audio-codec-1 {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dit";
status = "okay";
sound-name-prefix = "DIT";
};
sound {
compatible = "amlogic,axg-sound-card";
model = "G12B-UGOOS-AM6";
audio-aux-devs = <&tdmout_b>;
audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
"TDMOUT_B IN 1", "FRDDR_B OUT 1",
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT",
"SPDIFOUT IN 0", "FRDDR_A OUT 3",
"SPDIFOUT IN 1", "FRDDR_B OUT 3",
"SPDIFOUT IN 2", "FRDDR_C OUT 3";
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clock-parents = <0>, <0>, <0>;
assigned-clock-rates = <294912000>,
<270950400>,
<393216000>;
status = "okay";
dai-link-0 {
sound-dai = <&frddr_a>;
};
dai-link-1 {
sound-dai = <&frddr_b>;
};
dai-link-2 {
sound-dai = <&frddr_c>;
};
/* 8ch hdmi interface */
dai-link-3 {
sound-dai = <&tdmif_b>;
dai-format = "i2s";
dai-tdm-slot-tx-mask-0 = <1 1>;
dai-tdm-slot-tx-mask-1 = <1 1>;
dai-tdm-slot-tx-mask-2 = <1 1>;
dai-tdm-slot-tx-mask-3 = <1 1>;
mclk-fs = <256>;
codec {
sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
};
};
/* spdif hdmi or toslink interface */
dai-link-4 {
sound-dai = <&spdifout>;
codec-0 {
sound-dai = <&spdif_dit>;
};
codec-1 {
sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>;
};
};
/* spdif hdmi interface */
dai-link-5 {
sound-dai = <&spdifout_b>;
codec {
sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>;
};
};
/* hdmi glue */
dai-link-6 {
sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
codec {
sound-dai = <&hdmi_tx>;
};
};
};
};
&arb {
status = "okay";
};
&clkc_audio {
status = "okay";
};
&frddr_a {
status = "okay";
};
&frddr_b {
status = "okay";
};
&frddr_c {
status = "okay";
};
&ir {
linux,rc-map-name = "rc-khadas";
};
&spdifout {
pinctrl-0 = <&spdif_out_h_pins>;
pinctrl-names = "default";
status = "okay";
};
&spdifout_b {
status = "okay";
};
&tdmif_b {
status = "okay";
};
&tdmout_b {
status = "okay";
};
&tohdmitx {
status = "okay";
};
&uart_A {
status = "okay";
pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
pinctrl-names = "default";
uart-has-rtscts;
bluetooth {
compatible = "brcm,bcm43438-bt";
shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
max-speed = <2000000>;
clocks = <&wifi32k>;
clock-names = "lpo";
};
};
&uart_AO {
status = "okay";
pinctrl-0 = <&uart_ao_a_pins>;
pinctrl-names = "default";
};
&usb {
status = "okay";
dr_mode = "host";
vbus-supply = <&usb_pwr_en>;
};
&usb2_phy0 {
phy-supply = <&usb1_pow>;
};
&usb2_phy1 {
phy-supply = <&usb1_pow>;
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre, SAS
* Author: Neil Armstrong <narmstrong@baylibre.com>
* Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
*/
/dts-v1/;
#include "meson-g12b.dtsi"
#include "meson-g12b-s922x.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/meson-g12a-gpio.h>
/ {
aliases {
serial0 = &uart_AO;
ethernet0 = &ethmac;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x40000000>;
};
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
clocks = <&wifi32k>;
clock-names = "ext_clock";
};
flash_1v8: regulator-flash_1v8 {
compatible = "regulator-fixed";
regulator-name = "FLASH_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_3v3>;
regulator-always-on;
};
main_12v: regulator-main_12v {
compatible = "regulator-fixed";
regulator-name = "12V";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
regulator-always-on;
};
vcc_5v: regulator-vcc_5v {
compatible = "regulator-fixed";
regulator-name = "VCC_5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&main_12v>;
gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
enable-active-high;
};
vcc_1v8: regulator-vcc_1v8 {
compatible = "regulator-fixed";
regulator-name = "VCC_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_3v3>;
regulator-always-on;
};
vcc_3v3: regulator-vcc_3v3 {
compatible = "regulator-fixed";
regulator-name = "VCC_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vddao_3v3>;
regulator-always-on;
/* FIXME: actually controlled by VDDCPU_B_EN */
};
vddcpu_a: regulator-vddcpu-a {
/*
* MP1653 Regulator.
*/
compatible = "pwm-regulator";
regulator-name = "VDDCPU_A";
regulator-min-microvolt = <721000>;
regulator-max-microvolt = <1022000>;
pwm-supply = <&main_12v>;
pwms = <&pwm_ab 0 1250 0>;
pwm-dutycycle-range = <100 0>;
regulator-boot-on;
regulator-always-on;
};
vddcpu_b: regulator-vddcpu-b {
/*
* MP1652 Regulator.
*/
compatible = "pwm-regulator";
regulator-name = "VDDCPU_B";
regulator-min-microvolt = <721000>;
regulator-max-microvolt = <1022000>;
pwm-supply = <&main_12v>;
pwms = <&pwm_AO_cd 1 1250 0>;
pwm-dutycycle-range = <100 0>;
regulator-boot-on;
regulator-always-on;
};
usb1_pow: regulator-usb1-pow {
compatible = "regulator-fixed";
regulator-name = "USB1_POW";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc_5v>;
/* connected to SY6280A Power Switch */
gpio = <&gpio GPIOA_8 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
usb_pwr_en: regulator-usb-pwr-en {
compatible = "regulator-fixed";
regulator-name = "USB_PWR_EN";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc_5v>;
/* Connected to USB3 Type-A Port power enable */
gpio = <&gpio GPIOAO_7 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vddao_1v8: regulator-vddao-1v8 {
compatible = "regulator-fixed";
regulator-name = "VDDAO_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vddao_3v3>;
regulator-always-on;
};
vddao_3v3: regulator-vddao-3v3 {
compatible = "regulator-fixed";
regulator-name = "VDDAO_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&main_12v>;
regulator-always-on;
};
cvbs-connector {
compatible = "composite-video-connector";
port {
cvbs_connector_in: endpoint {
remote-endpoint = <&cvbs_vdac_out>;
};
};
};
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&hdmi_tx_tmds_out>;
};
};
};
wifi32k: wifi32k {
compatible = "pwm-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
};
};
&cec_AO {
pinctrl-0 = <&cec_ao_a_h_pins>;
pinctrl-names = "default";
status = "disabled";
hdmi-phandle = <&hdmi_tx>;
};
&cecb_AO {
pinctrl-0 = <&cec_ao_b_h_pins>;
pinctrl-names = "default";
status = "okay";
hdmi-phandle = <&hdmi_tx>;
};
&cpu0 {
cpu-supply = <&vddcpu_b>;
operating-points-v2 = <&cpu_opp_table_0>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu1 {
cpu-supply = <&vddcpu_b>;
operating-points-v2 = <&cpu_opp_table_0>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu100 {
cpu-supply = <&vddcpu_a>;
operating-points-v2 = <&cpub_opp_table_1>;
clocks = <&clkc CLKID_CPUB_CLK>;
clock-latency = <50000>;
};
&cpu101 {
cpu-supply = <&vddcpu_a>;
operating-points-v2 = <&cpub_opp_table_1>;
clocks = <&clkc CLKID_CPUB_CLK>;
clock-latency = <50000>;
};
&cpu102 {
cpu-supply = <&vddcpu_a>;
operating-points-v2 = <&cpub_opp_table_1>;
clocks = <&clkc CLKID_CPUB_CLK>;
clock-latency = <50000>;
};
&cpu103 {
cpu-supply = <&vddcpu_a>;
operating-points-v2 = <&cpub_opp_table_1>;
clocks = <&clkc CLKID_CPUB_CLK>;
clock-latency = <50000>;
};
&cvbs_vdac_port {
cvbs_vdac_out: endpoint {
remote-endpoint = <&cvbs_connector_in>;
};
};
&ext_mdio {
external_phy: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
reg = <0>;
max-speed = <1000>;
reset-assert-us = <10000>;
reset-deassert-us = <80000>;
reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
interrupt-parent = <&gpio_intc>;
/* MAC_INTR on GPIOZ_14 */
interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
};
};
&ethmac {
pinctrl-0 = <&eth_pins>, <&eth_rgmii_pins>;
pinctrl-names = "default";
status = "okay";
phy-mode = "rgmii";
phy-handle = <&external_phy>;
amlogic,tx-delay-ns = <2>;
};
&hdmi_tx {
status = "okay";
pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
pinctrl-names = "default";
hdmi-supply = <&vcc_5v>;
};
&hdmi_tx_tmds_port {
hdmi_tx_tmds_out: endpoint {
remote-endpoint = <&hdmi_connector_in>;
};
};
&ir {
status = "okay";
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
};
&pwm_ab {
pinctrl-0 = <&pwm_a_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
status = "okay";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};
&pwm_ef {
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
status = "okay";
};
/* SDIO */
&sd_emmc_a {
status = "okay";
pinctrl-0 = <&sdio_pins>;
pinctrl-1 = <&sdio_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
#address-cells = <1>;
#size-cells = <0>;
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <100000000>;
/* WiFi firmware requires power to be kept while in suspend */
keep-power-in-suspend;
non-removable;
disable-wp;
mmc-pwrseq = <&sdio_pwrseq>;
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vddao_1v8>;
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
};
};
/* SD card */
&sd_emmc_b {
status = "okay";
pinctrl-0 = <&sdcard_c_pins>;
pinctrl-1 = <&sdcard_clk_gate_c_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <50000000>;
disable-wp;
cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vddao_3v3>;
};
/* eMMC */
&sd_emmc_c {
status = "okay";
pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
pinctrl-1 = <&emmc_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <8>;
cap-mmc-highspeed;
max-frequency = <100000000>;
disable-wp;
mmc-pwrseq = <&emmc_pwrseq>;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&flash_1v8>;
};
&uart_A {
status = "okay";
pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
pinctrl-names = "default";
uart-has-rtscts;
bluetooth {
compatible = "brcm,bcm43438-bt";
shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
max-speed = <2000000>;
clocks = <&wifi32k>;
clock-names = "lpo";
};
};
&uart_AO {
status = "okay";
pinctrl-0 = <&uart_ao_a_pins>;
pinctrl-names = "default";
};
&usb {
status = "okay";
dr_mode = "host";
vbus-supply = <&usb_pwr_en>;
};
&usb2_phy0 {
phy-supply = <&usb1_pow>;
};
&usb2_phy1 {
phy-supply = <&usb1_pow>;
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre, SAS
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
#include "meson-g12.dtsi"
/ {
compatible = "amlogic,g12b";
cpus {
#address-cells = <0x2>;
#size-cells = <0x0>;
cpu-map {
cluster0 {
core0 {
cpu = <&cpu0>;
};
core1 {
cpu = <&cpu1>;
};
};
cluster1 {
core0 {
cpu = <&cpu100>;
};
core1 {
cpu = <&cpu101>;
};
core2 {
cpu = <&cpu102>;
};
core3 {
cpu = <&cpu103>;
};
};
};
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x0>;
enable-method = "psci";
capacity-dmips-mhz = <592>;
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x1>;
enable-method = "psci";
capacity-dmips-mhz = <592>;
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
cpu100: cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a73";
reg = <0x0 0x100>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
cpu101: cpu@101 {
device_type = "cpu";
compatible = "arm,cortex-a73";
reg = <0x0 0x101>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
cpu102: cpu@102 {
device_type = "cpu";
compatible = "arm,cortex-a73";
reg = <0x0 0x102>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
cpu103: cpu@103 {
device_type = "cpu";
compatible = "arm,cortex-a73";
reg = <0x0 0x103>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
l2: l2-cache0 {
compatible = "cache";
};
};
};
&clkc {
compatible = "amlogic,g12b-clkc";
};
&cpu_thermal {
cooling-maps {
map0 {
trip = <&cpu_passive>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cpu_hot>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
&mali {
dma-coherent;
};

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// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2019 BayLibre SAS.
* Author: Jerome Brunet <jbrunet@baylibre.com>
*/
/* Libretech Amlogic GX PC form factor - AKA: Tartiflette */
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/sound/meson-aiu.h>
/ {
adc-keys {
compatible = "adc-keys";
io-channels = <&saradc 0>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
update-button {
label = "update";
linux,code = <KEY_VENDOR>;
press-threshold-microvolt = <1300000>;
};
};
aliases {
serial0 = &uart_AO;
ethernet0 = &ethmac;
spi0 = &spifc;
};
dio2133: analog-amplifier {
compatible = "simple-audio-amplifier";
sound-name-prefix = "AU2";
VCC-supply = <&vcc5v>;
enable-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
};
chosen {
stdout-path = "serial0:115200n8";
};
cvbs-connector {
compatible = "composite-video-connector";
status = "disabled";
port {
cvbs_connector_in: endpoint {
remote-endpoint = <&cvbs_vdac_out>;
};
};
};
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
};
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&hdmi_tx_tmds_out>;
};
};
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
poll-interval = <100>;
power-button {
label = "power";
linux,code = <KEY_POWER>;
gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
};
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
ao_5v: regulator-ao_5v {
compatible = "regulator-fixed";
regulator-name = "AO_5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&dc_in>;
regulator-always-on;
};
dc_in: regulator-dc_in {
compatible = "regulator-fixed";
regulator-name = "DC_IN";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
leds {
compatible = "gpio-leds";
led-green {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_DISK_ACTIVITY;
gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "disk-activity";
};
led-blue {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
gpios = <&gpio GPIODV_28 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
panic-indicator;
};
};
vcc_card: regulator-vcc_card {
compatible = "regulator-fixed";
regulator-name = "VCC_CARD";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vddio_ao3v3>;
gpio = <&gpio GPIODV_4 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vcc5v: regulator-vcc5v {
compatible = "regulator-fixed";
regulator-name = "VCC5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&ao_5v>;
gpio = <&gpio GPIOH_3 GPIO_OPEN_DRAIN>;
};
vddio_ao18: regulator-vddio_ao18 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&ao_5v>;
regulator-always-on;
};
vddio_ao3v3: regulator-vddio_ao3v3 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&ao_5v>;
regulator-always-on;
};
vddio_boot: regulator-vddio_boot {
compatible = "regulator-fixed";
regulator-name = "VDDIO_BOOT";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vddio_ao3v3>;
regulator-always-on;
};
vddio_card: regulator-vddio-card {
compatible = "regulator-gpio";
regulator-name = "VDDIO_CARD";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio GPIODV_5 GPIO_ACTIVE_HIGH>;
gpios-states = <0>;
states = <3300000 0>,
<1800000 1>;
regulator-settling-time-up-us = <200>;
regulator-settling-time-down-us = <50000>;
};
sound {
compatible = "amlogic,gx-sound-card";
model = "GXL-LIBRETECH-S9XX-PC";
audio-aux-devs = <&dio2133>;
audio-widgets = "Speaker", "7J4-14 LEFT",
"Speaker", "7J4-11 RIGHT";
audio-routing = "AU2 INL", "ACODEC LOLN",
"AU2 INR", "ACODEC LORN",
"7J4-14 LEFT", "AU2 OUTL",
"7J4-11 RIGHT", "AU2 OUTR";
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clock-parents = <0>, <0>, <0>;
assigned-clock-rates = <294912000>,
<270950400>,
<393216000>;
status = "okay";
dai-link-0 {
sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
};
dai-link-1 {
sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
dai-format = "i2s";
mclk-fs = <256>;
codec-0 {
sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
};
codec-1 {
sound-dai = <&aiu AIU_ACODEC CTRL_I2S>;
};
};
dai-link-2 {
sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
codec-0 {
sound-dai = <&hdmi_tx>;
};
};
dai-link-3 {
sound-dai = <&aiu AIU_ACODEC CTRL_OUT>;
codec-0 {
sound-dai = <&acodec>;
};
};
};
};
&acodec {
AVDD-supply = <&vddio_ao18>;
status = "okay";
};
&aiu {
status = "okay";
};
&cec_AO {
pinctrl-0 = <&ao_cec_pins>;
pinctrl-names = "default";
hdmi-phandle = <&hdmi_tx>;
status = "okay";
};
&cvbs_vdac_port {
cvbs_vdac_out: endpoint {
remote-endpoint = <&cvbs_connector_in>;
};
};
&ethmac {
pinctrl-0 = <&eth_pins>, <&eth_phy_irq_pins>;
pinctrl-names = "default";
phy-handle = <&external_phy>;
amlogic,tx-delay-ns = <2>;
phy-mode = "rgmii";
status = "okay";
};
&external_mdio {
external_phy: ethernet-phy@0 {
reg = <0>;
max-speed = <1000>;
reset-assert-us = <10000>;
reset-deassert-us = <30000>;
reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio_intc>;
interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
};
};
&pinctrl_periphs {
/*
* Make sure the reset pin of the usb HUB is driven high to take
* it out of reset.
*/
usb1_rst_pins: usb1_rst_irq {
mux {
groups = "GPIODV_3";
function = "gpio_periphs";
bias-disable;
output-high;
};
};
/* Make sure the phy irq pin is properly configured as input */
eth_phy_irq_pins: eth_phy_irq {
mux {
groups = "GPIOZ_15";
function = "gpio_periphs";
bias-disable;
output-disable;
};
};
};
&hdmi_tx {
pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
pinctrl-names = "default";
hdmi-supply = <&vcc5v>;
status = "okay";
};
&hdmi_tx_tmds_port {
hdmi_tx_tmds_out: endpoint {
remote-endpoint = <&hdmi_connector_in>;
};
};
&ir {
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
status = "okay";
};
&i2c_C {
pinctrl-0 = <&i2c_c_dv18_pins>;
pinctrl-names = "default";
status = "okay";
rtc: rtc@51 {
reg = <0x51>;
compatible = "nxp,pcf8563";
#clock-cells = <0>;
clock-output-names = "rtc_clkout";
};
};
&pwm_AO_ab {
pinctrl-0 = <&pwm_ao_a_3_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
status = "okay";
};
&pwm_ab {
pinctrl-0 = <&pwm_b_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
status = "okay";
};
&pwm_ef {
pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
status = "okay";
};
&saradc {
vref-supply = <&vddio_ao18>;
status = "okay";
};
/* SD card */
&sd_emmc_b {
pinctrl-0 = <&sdcard_pins>;
pinctrl-1 = <&sdcard_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <4>;
cap-sd-highspeed;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-ddr50;
max-frequency = <200000000>;
disable-wp;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vcc_card>;
vqmmc-supply = <&vddio_card>;
status = "okay";
};
/* eMMC */
&sd_emmc_c {
pinctrl-0 = <&emmc_pins>;
pinctrl-1 = <&emmc_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <8>;
cap-mmc-highspeed;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
max-frequency = <200000000>;
disable-wp;
mmc-pwrseq = <&emmc_pwrseq>;
vmmc-supply = <&vddio_ao3v3>;
vqmmc-supply = <&vddio_boot>;
status = "okay";
};
&spifc {
pinctrl-0 = <&nor_pins>;
pinctrl-names = "default";
status = "okay";
gd25lq128: spi-flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
spi-max-frequency = <12000000>;
};
};
&uart_AO {
pinctrl-0 = <&uart_ao_a_pins>;
pinctrl-names = "default";
status = "okay";
};
&usb {
status = "okay";
dr_mode = "host";
};
&usb2_phy0 {
pinctrl-0 = <&usb1_rst_pins>;
pinctrl-names = "default";
phy-supply = <&vcc5v>;
};
&usb2_phy1 {
phy-supply = <&vcc5v>;
};

61
arch/arm64/boot/dts/amlogic/meson-gx-mali450.dtsi
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@ -1,61 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2017 BayLibre SAS
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
/ {
gpu_opp_table: opp-table {
compatible = "operating-points-v2";
opp-125000000 {
opp-hz = /bits/ 64 <125000000>;
opp-microvolt = <950000>;
};
opp-250000000 {
opp-hz = /bits/ 64 <250000000>;
opp-microvolt = <950000>;
};
opp-285714285 {
opp-hz = /bits/ 64 <285714285>;
opp-microvolt = <950000>;
};
opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <950000>;
};
opp-500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <950000>;
};
opp-666666666 {
opp-hz = /bits/ 64 <666666666>;
opp-microvolt = <950000>;
};
opp-744000000 {
opp-hz = /bits/ 64 <744000000>;
opp-microvolt = <950000>;
};
};
};
&apb {
mali: gpu@c0000 {
compatible = "arm,mali-450";
reg = <0x0 0xc0000 0x0 0x40000>;
interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "gp", "gpmmu", "pp", "pmu",
"pp0", "ppmmu0", "pp1", "ppmmu1",
"pp2", "ppmmu2";
operating-points-v2 = <&gpu_opp_table>;
};
};

324
arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
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@ -1,324 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2016 Endless Computers, Inc.
* Author: Carlo Caione <carlo@endlessm.com>
*/
/* Common DTSI for same Amlogic Q200/Q201 and P230/P231 boards using either
* the pin-compatible S912 (GXM) or S905D (GXL) SoCs.
*/
#include <dt-bindings/sound/meson-aiu.h>
/ {
aliases {
serial0 = &uart_AO;
ethernet0 = &ethmac;
};
dio2133: analog-amplifier {
compatible = "simple-audio-amplifier";
sound-name-prefix = "AU2";
VCC-supply = <&hdmi_5v>;
enable-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
};
spdif_dit: audio-codec-0 {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dit";
status = "okay";
sound-name-prefix = "DIT";
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
hdmi_5v: regulator-hdmi-5v {
compatible = "regulator-fixed";
regulator-name = "HDMI_5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
};
vddio_ao18: regulator-vddio_ao18 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vddio_boot: regulator-vddio_boot {
compatible = "regulator-fixed";
regulator-name = "VDDIO_BOOT";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vddao_3v3: regulator-vddao_3v3 {
compatible = "regulator-fixed";
regulator-name = "VDDAO_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vcc_3v3: regulator-vcc_3v3 {
compatible = "regulator-fixed";
regulator-name = "VCC_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
};
wifi32k: wifi32k {
compatible = "pwm-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
clocks = <&wifi32k>;
clock-names = "ext_clock";
};
cvbs-connector {
compatible = "composite-video-connector";
port {
cvbs_connector_in: endpoint {
remote-endpoint = <&cvbs_vdac_out>;
};
};
};
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&hdmi_tx_tmds_out>;
};
};
};
sound {
compatible = "amlogic,gx-sound-card";
model = "GX-P230-Q200";
audio-aux-devs = <&dio2133>;
audio-widgets = "Line", "Lineout";
audio-routing = "AU2 INL", "ACODEC LOLP",
"AU2 INR", "ACODEC LORP",
"AU2 INL", "ACODEC LOLN",
"AU2 INR", "ACODEC LORN",
"Lineout", "AU2 OUTL",
"Lineout", "AU2 OUTR";
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clock-parents = <0>, <0>, <0>;
assigned-clock-rates = <294912000>,
<270950400>,
<393216000>;
status = "okay";
dai-link-0 {
sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
};
dai-link-1 {
sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>;
};
dai-link-2 {
sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
dai-format = "i2s";
mclk-fs = <256>;
codec-0 {
sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
};
codec-1 {
sound-dai = <&aiu AIU_ACODEC CTRL_I2S>;
};
};
dai-link-3 {
sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>;
codec-0 {
sound-dai = <&spdif_dit>;
};
};
dai-link-4 {
sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
codec-0 {
sound-dai = <&hdmi_tx>;
};
};
dai-link-5 {
sound-dai = <&aiu AIU_ACODEC CTRL_OUT>;
codec-0 {
sound-dai = <&acodec>;
};
};
};
};
&acodec {
AVDD-supply = <&vddio_ao18>;
status = "okay";
};
&aiu {
status = "okay";
pinctrl-0 = <&spdif_out_h_pins>;
pinctrl-names = "default";
};
&cec_AO {
status = "okay";
pinctrl-0 = <&ao_cec_pins>;
pinctrl-names = "default";
hdmi-phandle = <&hdmi_tx>;
};
&cvbs_vdac_port {
cvbs_vdac_out: endpoint {
remote-endpoint = <&cvbs_connector_in>;
};
};
&ethmac {
status = "okay";
};
&hdmi_tx {
status = "okay";
pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
pinctrl-names = "default";
hdmi-supply = <&hdmi_5v>;
};
&hdmi_tx_tmds_port {
hdmi_tx_tmds_out: endpoint {
remote-endpoint = <&hdmi_connector_in>;
};
};
&ir {
status = "okay";
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
};
&pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
};
&saradc {
status = "okay";
vref-supply = <&vddio_ao18>;
};
/* Wireless SDIO Module */
&sd_emmc_a {
status = "okay";
pinctrl-0 = <&sdio_pins>;
pinctrl-1 = <&sdio_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
#address-cells = <1>;
#size-cells = <0>;
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <50000000>;
non-removable;
disable-wp;
/* WiFi firmware requires power to be kept while in suspend */
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vddio_boot>;
};
/* SD card */
&sd_emmc_b {
status = "okay";
pinctrl-0 = <&sdcard_pins>;
pinctrl-1 = <&sdcard_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <50000000>;
disable-wp;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vddio_boot>;
};
/* eMMC */
&sd_emmc_c {
status = "okay";
pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
pinctrl-1 = <&emmc_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <8>;
cap-mmc-highspeed;
max-frequency = <200000000>;
non-removable;
disable-wp;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
mmc-pwrseq = <&emmc_pwrseq>;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&vddio_boot>;
};
/* This UART is brought out to the DB9 connector */
&uart_AO {
status = "okay";
pinctrl-0 = <&uart_ao_a_pins>;
pinctrl-names = "default";
};
&usb {
status = "okay";
dr_mode = "otg";
};

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