2026-01-21 18:59:54 +08:00
|
|
|
/* SPDX-License-Identifier: GPL-2.0 */
|
|
|
|
|
#ifndef PERF_CACHELINE_H
|
|
|
|
|
#define PERF_CACHELINE_H
|
|
|
|
|
|
|
|
|
|
#include <linux/compiler.h>
|
|
|
|
|
|
|
|
|
|
int __pure cacheline_size(void);
|
|
|
|
|
|
2026-01-29 22:25:33 +08:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Some architectures have 'Adjacent Cacheline Prefetch' feature,
|
|
|
|
|
* which performs like the cacheline size being doubled.
|
|
|
|
|
*/
|
|
|
|
|
static inline u64 cl_address(u64 address, bool double_cl)
|
2026-01-21 18:59:54 +08:00
|
|
|
{
|
2026-01-29 22:25:33 +08:00
|
|
|
u64 size = cacheline_size();
|
|
|
|
|
|
|
|
|
|
if (double_cl)
|
|
|
|
|
size *= 2;
|
|
|
|
|
|
2026-01-21 18:59:54 +08:00
|
|
|
/* return the cacheline of the address */
|
2026-01-29 22:25:33 +08:00
|
|
|
return (address & ~(size - 1));
|
2026-01-21 18:59:54 +08:00
|
|
|
}
|
|
|
|
|
|
2026-01-29 22:25:33 +08:00
|
|
|
static inline u64 cl_offset(u64 address, bool double_cl)
|
2026-01-21 18:59:54 +08:00
|
|
|
{
|
2026-01-29 22:25:33 +08:00
|
|
|
u64 size = cacheline_size();
|
|
|
|
|
|
|
|
|
|
if (double_cl)
|
|
|
|
|
size *= 2;
|
|
|
|
|
|
|
|
|
|
/* return the offset inside cacheline */
|
|
|
|
|
return (address & (size - 1));
|
2026-01-21 18:59:54 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#endif // PERF_CACHELINE_H
|
